DMA and multiplexing of memory access
Original thoughts
Multiplexing access to buffer memory with 3:1 priority to input side
would cause a large waste of bandwidth on the PCI bus if the data were
copied directly from the buffer to the PCI bus. Either use
intermediate buffer on the RoB-in side of the PCI bridge or change
dual porting strategy.
Use DMA to copy data from main buffer to intermediate buffer,
implications for processor choice.
Set up a chained DMA from intermediate buffer to PCI bus. Do not read
from PCI until DMA has completed.
Note from discussion 17-Sep-1996
This is probably an unnecessary worry if a sensible arbitration
strategy is used for the PCI bus.
- If no-one else wants the bus it doesn't matter if we use it
inefficiently.
- If someone else wants the bus the arbiter should let them have it
within a few (~6) cycles and should let them keep it for a few (~6)
cycles. While we don't have the bus our bridge will be collecting
data in an internal FIFO until we get the bus back so when we do get
it back we will have data ready to go.
DMA with i960RP
The DMA controller on the i960RP allows for moving data between the
i960 local bus and the PCI bus only. It does not allow copying of
data from one place on the local bus to another.
The only sensible way to send data out of the RoB-in is to use the
i960RP's DMA controller, we do not have enough CPU cycles to spare
to copy data under CPU control.
One particular feature of the i960RP's DMA controller is the ability
to append a new descriptor to the end of an already running DMA.
GJC
(gjc@hep.ucl.ac.uk)