ROB-IN DESIGN REVIEW 1 (15-SEP-1997)
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(Last mod: 22-Sep-1997, R.Cranfield)

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Check of URD items against current rob-in design
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(from rob-in design review, 15-Sep-1997)

Starred items imply actions to be taken.

3.1)
3.1.1)

UR DI-RATE:
   Estimate for 33MHz i960RP ~= 75kHz.

*  Note in addendum to Product Brief.

UR DI-EFS:
   Page size programmable via PLD -- event size depends on page size.

UR-DI_IDR:
   Start/end control word on S-LINK -- recognised by hardware.
   Bandwidth of buffer memory = 4 * 33 MB/s
   link clock can be faster (depends on input fifo), but average bandwidth
   =< 132.

UR DI-FC:
   XOFF on data input controlled by control bit which operates
   automatically at pre-programmed level on the free-page fifo or toggled
   by software.

*  Input fifo could still overflow --> add in XOFF control by
   input-fifo half-full (use 2nd control bit).

*  Pin for L1-inhibit still desirable on prototype -
   from separately programmed free-page fifo level.

UR DI-EXP:
   Final system.

UR DI-ALLO:
   ok

3.1.2)

UR L2-BS:
   1 MB planned -- ok for prototype

UR L2-ROI:
   ok

UR L2-REJ:
   ok. Buffer manager accepts message with list of up to 100 decisions.

UR L2-ACC:
   ok

3.1.3)

UR L3-OUT:
   L3-request rather than L2_accept triggers data transfer.
   Incomplete URD table irrelevant?
   Ratio of input rate to output rate for original T2B was 3:1, but in the
   current design is not yet tied down -- wait to see what is needed in
   practice.

UR L3-WAIT:
   ok

3.1.4)

UR CTL-SC:
   Run control yet to be defined.

UR CTL-CONF:
   Reprogrammable ROM on board.

3.1.5)

UR ERR-TRANS:
   S-LINK has an error line that can be pulled down, but errors can also
be flagged in last two data bits. Error information is only really needed
on an event-by-event basis, thus error line serves no purpose beyond what
is in the control words.

   Error line is available in rob-in status register and control words get
written into memory. Status bits get or'd over all words in an event and
written into the used page fifo; since the used page fifo has to be read
anyway this is an efficient place to put link error info (e.g. start
without end, end without start, etc.).

Start of event is written both at end of previous event and beginning of
new event. Data with no start is ignored (since it had been agreed earlier
that the rob-in should start cleanly and not in the middle of an event).

Should a dummy fragment be generated or allowed to go into memory?
What if the control word is illegal?
Start and end are actually human-readable nibbles ("BOB" and "EOB"), but
they differ in only a couple of bits. Bit 30 is sufficient to distinguish
between them.

UR ERR-FBIG:
   An event is limited to a maximum of the number of pages allowed per
event in the index table. After that pages get thrown away.

UR ERR-FERR:
   Final system.

UR ERR-MON:
   Negotiable, ambiguous -- don't worry at this stage.

UR ERR-DATA:
   Unknown TTC_ID: historical -- no longer any TTC input!
   Orphan fragment: historical -- no longer any TTC input!
   Unknown RoI_request: ok
   Unknown L2_accept: ok. Triggered by L3_request, rather than L2_accept.
   Unknown L2_reject: ok
   Forgotten fragment: Current implementation has a "stale fragment" list
-- best that can be done?
   L3_done not received: Current software assumes an L3_done will be
received and handles it like an L2_reject. Else it becomes a stale fragment.

UR ERR-REC:
   Final system.

3.1.6)

UR GBL-MON:
   To be defined (by DAQ -1?).

UR GBL-HIST:
   A "sliding window" history of messages is implicitly provided by the
circular message buffer.

UR GBL-PERF:
   Final system.

UR GBL-ACC:
   ok

UR GBL-AUTO:
   No room for self-contained data injection into the input fifo.
   S-LINK test mode should be ok -- seen as a series of "start" control
words. Therefore SLIDAS can be used, with test mode initiated by control
word written by the rob-in.

3.2)
3.2.1)

UR CON-SIZE:
   to be seen!

UR CON-POW:
   This is an area for concern, particularly in view of the power required
by S-LINK (SCSI destination requires 3-4 Watts, Fibre Channel even more.
PMC spec allows 7.5 W total, though RIO2 documentation refers to only 4 W.

* May need to arrange special cooling and/or remote S-LINK module (via,
for example, the RHUL S-LINK to cable adapter board).

UR CON-COST:
   Final system, but does not seem unreasonable.

UR CON-RC:
   Final system.

UR CON-MON:
   Final system.

UR CON-EB:
   ok

UR CON-L2:
   ok

Extra functionality:
--------------------

2nd PMC connector is no longer implemented (causes space problems, and is
unlikely to be used because it would further increase the power requirement).

Flat-cable S-LINK connector could cause termination problems (& routing
problems), but might ease power problem.
* Better solution would be an S-LINK to flat cable CMC card.

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Points arising from the Design Notes:
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DMA multiplexing:
   Design allows i960 to access buffer for 1 out of n cycles.
   Currently unrestricted, but should perhaps be eventually constrained
   after tests. Documentation suggests that this will not prevent i960
from writing to PCI in burst mode, but this can be checked eventually with
a PCI bus analyser.

Self-test:
   Not implemented (see above), but should try for this in the next
version.

Memory size & organisation / fifo width:
   memory size should be checked and noted in Product Brief.

Diagram:
   Update XOFF (from input fifo as well -- use PAE, Programmable Almost
Empty).
   S-LINK error bit into input fifo (LDERR#).
   L1 inhibit pin (from PAF, Programmable Almost Full).

RM to feed back to RC on Product Brief.
List of documents to be added to the rob-in WWW page.

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