Post-manufacture FINISHING-OFF sequence to production TIM-3E/CSC modules ======================================================================== ( This applies to the TIM-3E modules for CSC only ) MP-UCL, 27-10-2005 ************************************************************************* NOTE : For ***PHOTOS***, see : ------ http://www.hep.ucl.ac.uk/atlas/sct/tim/tim-muons.shtml http://www.hep.ucl.ac.uk/atlas/sct/tim/v3/TIM3C_Setup_Photos.pdf ************************************************************************ 1) Add the missing fastening screw to both TOP and BOTTOM 'Rittal' handles on the front panel. 2) Mark with white paint ( eg. Tippex ) the r/hand 'ON' side/edge of all four DIL switches SW7,8,9,10 3) Add all links as per "SETTING-UP" list : http://www.hep.ucl.ac.uk/atlas/sct/tim/tim-muons.shtml 4) Hardwire SERIAL NUMBER by un-soldering relevant pull-down 0 Ohm resistors R90-97 below the U75 ( see Diag.07 ) : R97 = SERN(7) = MSB ***SEE PHOTO 7*** R90 = SERN(0) = LSB - All these resistors are soldered in by manufacturer, thus setting all bits SERN<0-7> = GND = 0 - Any bit which requires to be set HIGH = 1 needs to have resistor removed ( NOTE : Hexadecimal coding applies ) ------ ( on SCT & PIXELs TIM-3Cs, we have used serial numbers #26 to #49 in decimals only ) - TO MAKE THE MVD/CSS TIM-3Es OBVIOUSLY AND IMMEDIATELY DIFFERENT, WE WOULD SUGGEST THAT THE BITS SERN(6) and SERN(5) ARE SET TO '1' ( ie. the resistors R96 and R95 are removed ) ON ALL TIM-3E MODULES - This would give TIM-3E modules the serial number range from #60 upward. ( NOTE : Hexadecimal coding applies ) ------ 5) Set VME Base Address switches as required for non-geographic addressing mode - if needed ***SEE PHOTO 1*** ( NOTE : TIM-3E defaults to Base Address 0x0D00, which is the ------ VME Geographical Address of "Slot 13" ) 6) Remove kapton tape from heatsink around VR1 7) You may wish to add an extra stiffening bar across the J1,J2,J3 backplane connectors. Remember to cover the top and bottom of this bar with Kapton insulating tape. ***SEE PHOTOS 0,14*** - Use 3.6mm pre-cut spacers, with the MACHINED FACE *UPWARD*. - Use : M2.5x 16mm, PAN head, slotted, screws ( eg. RS 130-606 ) Otherwise, the J1,J2,J3 should have the missing M3 screws added. 8) You may wish to add the missing two M3 fastening screws on PL1. /cont: - 2 - 9) Use a cotton bud to lubricate all individual 'sockets' of the J21, J22, J23 daughter-board connectors on the 'component' side of the PCB ( use WD-40 or similar ) 10) If using TTCrq modules, insert the 7mm dual-line spacers into each of the J21, J22 ( 2x 25pins ) and J23 ( 2x 13pins ) connectors ***SEE PHOTO 8*** ( NOTE : Use 'E-tec' DIS-250-S009-01 spacers, available from ------ E-tec Interconnect (UK) Ltd ) 11) To allow TIM-3E modules to be re-programmed in a full crate, we recommend that the following adaptor is made : - Glue a FCI 98414-S08-14U ( 2mm pitch, 2x7 pin ) shrouded header into the pre-cut slot in the front panel, using Araldite - Connect the J4C header on PCB to this header, using two short lengths of 14-way 1mm pitch ribbon cable FCI 91820-014, with four 2mm pitch, 2x7 pin cable IDC connectors FCI 89947-314, and one 2x7 pin header/adaptor ( eg. Molex 877581416 ). ***SEE PHOTOS 9,10,11*** ( NOTE : FCI is available from FCI or Avnet or Newark/Farnell. ------ Molex is available from Molex or Farnell ) 12) Check for shorts between all power fuses FS1 - FS5 and to GND 13) Plug the TIM-3E module INTO SLOT 13 OF ROD CRATE ONLY !!! 14) Switch on crate power. Check for smoke (!) Check currents drawn : < 8A for +5V supply 15) Program the FPGA-1 & 2 - If correctly programmed, there should be at least 1x flashing LED for each of the two FPGA's This Version : MP - UCL, 27 Oct. 2005 Previous versions : 06 Oct. 2005 11 Aug. 2005 09 Aug. 2005 04 Aug. 2005 27 Jul. 2005