PLDocument:  Y:\clock\zeus\helix\2ch\helix2.doc
                  TITLE PAGE  Tue May 23 15:55:22 2000



   R MACHXL6.2.0.18 - (c) Copyright MINC Incorporated 1987-1998


==============================================================================

     TITLE    : PROTOTYPE HELIX DRIVER: VME INTERFACE AND BOARD LOGIC
     FILE     : Y:\clock\zeus\helix\2ch\helix2.mpf
     DATE     : Tue May 23 15:55:22 2000
     ENGINEER : Gil Nixon / Dominic A Hayes
     COMPANY  : University College London

     COMMENTS : VME interface and Logic: V2.0

==============================================================================


     MODULES  :

        Document Generator     	  3.69
        File Handler           	  6.2
        Language Compiler      	  3.83
        Architectural Optimizer	  3.110
        Device Lib Scan        	  3.2
        Device Library         	  3.1
        Device Partition       	  3.14
        Device Fusemap         	  3.88



     SWITCH VALUES :

        (Value in parenthesis represents batch mode switch value)

        PLCOMP PRODUCT TERM LIMIT : 128
        PLOPT  PRODUCT TERM LIMIT : 128
        PLOPT REDUCTION  :   Espresso (1)
        NODE GENERATION  :   Procedure Instantiation
                             Arithmetic and Relational Operators (1)


PLDocument:  Y:\clock\zeus\helix\2ch\helix2.doc
                  EQUATIONS  Tue May 23 15:55:22 2000


EQUATIONS FOR SYSTEM

INPUT SIGNALS (50) :

       LOW_TRUE   sreset
       LOW_TRUE   lwordb
       writeb
       LOW_TRUE   berrb
       LOW_TRUE   ds0b
       LOW_TRUE   ds1b
       LOW_TRUE   iackb
       amb[5..0]
       ab[23..1]
       dl1
       dl2
       base_addr[23..16]
       ck
       trig
       not_reset
       feedback_in

OUTPUT SIGNALS (29) :

       dl0
       ack
       oein
       oeout
       db_le
       wr
       rd
       errorled
       clock
       trig_sd
       load0
       load1
       hreset
       db[15..0]

PHYSICAL NODE SIGNALS (71) :

       am_OK
       addr_OK
       a[7..1]
       db_clk
       vreset
       vsr_low
       vsr_high
       vhloaden
       vstart
       feedback[19..0]
       en_feedback
       dboe
       q1
       q2
       start
       hloaden
       sr[19..0]
       ch0
       data
       count[4..0]
       count22
       count23
       data-int0


REDUCED EQUATIONS:


dl0.EQN(~) = /ds0b*/ds1b ;  "(1 term, 2 symbols)

am_OK.D = amb[0]*/amb[1]*amb[3]*amb[4]*amb[5]*
                     /iackb*/lwordb ;  "(1 term, 7 symbols)
am_OK.CLK = dl1 ;  "(1 term, 1 symbol)
am_OK.RESET = /dl0 ;  "(1 term, 1 symbol)

addr_OK.CLK = dl1 ;  "(1 term, 1 symbol)
addr_OK.RESET = /dl0 ;  "(1 term, 1 symbol)
addr_OK.D(~) = ab[16]*/base_addr[16]
                 + /ab[16]*base_addr[16]
                 + ab[17]*/base_addr[17]
                 + /ab[17]*base_addr[17]
                 + ab[18]*/base_addr[18]
                 + /ab[18]*base_addr[18]
                 + ab[19]*/base_addr[19]
                 + /ab[19]*base_addr[19]
                 + ab[20]*/base_addr[20]
                 + /ab[20]*base_addr[20]
                 + ab[21]*/base_addr[21]
                 + /ab[21]*base_addr[21]
                 + ab[22]*/base_addr[22]
                 + /ab[22]*base_addr[22]
                 + ab[23]*/base_addr[23]
                 + /ab[23]*base_addr[23] ;  "(16 terms, 16 symbols)

a[7].D = ab[7] ;  "(1 term, 1 symbol)
a[7].CLK = dl1 ;  "(1 term, 1 symbol)
a[7].RESET = /dl0 ;  "(1 term, 1 symbol)

a[6].D = ab[6] ;  "(1 term, 1 symbol)
a[6].CLK = dl1 ;  "(1 term, 1 symbol)
a[6].RESET = /dl0 ;  "(1 term, 1 symbol)

a[5].D = ab[5] ;  "(1 term, 1 symbol)
a[5].CLK = dl1 ;  "(1 term, 1 symbol)
a[5].RESET = /dl0 ;  "(1 term, 1 symbol)

a[4].D = ab[4] ;  "(1 term, 1 symbol)
a[4].CLK = dl1 ;  "(1 term, 1 symbol)
a[4].RESET = /dl0 ;  "(1 term, 1 symbol)

a[3].D = ab[3] ;  "(1 term, 1 symbol)
a[3].CLK = dl1 ;  "(1 term, 1 symbol)
a[3].RESET = /dl0 ;  "(1 term, 1 symbol)

a[2].D = ab[2] ;  "(1 term, 1 symbol)
a[2].CLK = dl1 ;  "(1 term, 1 symbol)
a[2].RESET = /dl0 ;  "(1 term, 1 symbol)

a[1].D = ab[1] ;  "(1 term, 1 symbol)
a[1].CLK = dl1 ;  "(1 term, 1 symbol)
a[1].RESET = /dl0 ;  "(1 term, 1 symbol)

ack.EQN = addr_OK*am_OK*dl2 ;  "(1 term, 3 symbols)

oein.EQN(~) = addr_OK*am_OK*/wr ;  "(1 term, 3 symbols)

oeout.EQN(~) = addr_OK*am_OK*dl2*/rd ;  "(1 term, 4 symbols)

db_le.EQN(~) = addr_OK*am_OK*/dl2 ;  "(1 term, 3 symbols)

db_clk.EQN = addr_OK*am_OK*/dl2*/wr ;  "(1 term, 4 symbols)

wr.EQN = writeb ;  "(1 term, 1 symbol)

rd.EQN = /writeb ;  "(1 term, 1 symbol)

vreset.EQN = a[1]*a[2]*a[3]*/a[4]*/a[5]*/a[6]*/a[7]
                     *addr_OK*am_OK ;  "(1 term, 9 symbols)

vsr_low.EQN = a[1]*/a[2]*/a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK ;  "(1 term, 9 symbols)

vsr_high.EQN = /a[1]*a[2]*/a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK ;  "(1 term, 9 symbols)

vhloaden.EQN = a[1]*/a[2]*a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK ;  "(1 term, 9 symbols)

vstart.EQN = /a[1]*a[2]*a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK ;  "(1 term, 9 symbols)

errorled.EQN = addr_OK*berrb ;  "(1 term, 2 symbols)

clock.EQN = ck ;  "(1 term, 1 symbol)

trig_sd.D = data*hloaden
                 + /hloaden*trig ;  "(2 terms, 3 symbols)
trig_sd.RESET = vreset ;  "(1 term, 1 symbol)
trig_sd.CLK(~) = ck ;  "(1 term, 1 symbol)

load0.D = /ch0*count[0]*/count[1]*count[2]*
                     /count[3]*count[4]*/rd*start ;  "(1 term, 8 symbols)
load0.RESET = vreset ;  "(1 term, 1 symbol)
load0.CLK(~) = ck ;  "(1 term, 1 symbol)

load1.D = ch0*count[0]*/count[1]*count[2]*
                     /count[3]*count[4]*/rd*start ;  "(1 term, 8 symbols)
load1.RESET = vreset ;  "(1 term, 1 symbol)
load1.CLK(~) = ck ;  "(1 term, 1 symbol)

hreset.RESET = vreset ;  "(1 term, 1 symbol)
hreset.D(~) = /a[1]*/a[2]*/a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK
                 + /not_reset
                 + sreset ;  "(3 terms, 11 symbols)
hreset.CLK(~) = ck ;  "(1 term, 1 symbol)

feedback[19].D = en_feedback*feedback[18]
                 + /en_feedback*feedback[19] ;  "(2 terms, 3 symbols)
feedback[19].CLK = ck ;  "(1 term, 1 symbol)
feedback[19].RESET = vreset ;  "(1 term, 1 symbol)

feedback[18].D = en_feedback*feedback[17]
                 + /en_feedback*feedback[18] ;  "(2 terms, 3 symbols)
feedback[18].CLK = ck ;  "(1 term, 1 symbol)
feedback[18].RESET = vreset ;  "(1 term, 1 symbol)

feedback[17].D = en_feedback*feedback[16]
                 + /en_feedback*feedback[17] ;  "(2 terms, 3 symbols)
feedback[17].CLK = ck ;  "(1 term, 1 symbol)
feedback[17].RESET = vreset ;  "(1 term, 1 symbol)

feedback[16].D = en_feedback*feedback[15]
                 + /en_feedback*feedback[16] ;  "(2 terms, 3 symbols)
feedback[16].CLK = ck ;  "(1 term, 1 symbol)
feedback[16].RESET = vreset ;  "(1 term, 1 symbol)

feedback[15].D = en_feedback*feedback[14]
                 + /en_feedback*feedback[15] ;  "(2 terms, 3 symbols)
feedback[15].CLK = ck ;  "(1 term, 1 symbol)
feedback[15].RESET = vreset ;  "(1 term, 1 symbol)

feedback[14].D = en_feedback*feedback[13]
                 + /en_feedback*feedback[14] ;  "(2 terms, 3 symbols)
feedback[14].CLK = ck ;  "(1 term, 1 symbol)
feedback[14].RESET = vreset ;  "(1 term, 1 symbol)

feedback[13].D = en_feedback*feedback[12]
                 + /en_feedback*feedback[13] ;  "(2 terms, 3 symbols)
feedback[13].CLK = ck ;  "(1 term, 1 symbol)
feedback[13].RESET = vreset ;  "(1 term, 1 symbol)

feedback[12].D = en_feedback*feedback[11]
                 + /en_feedback*feedback[12] ;  "(2 terms, 3 symbols)
feedback[12].CLK = ck ;  "(1 term, 1 symbol)
feedback[12].RESET = vreset ;  "(1 term, 1 symbol)

feedback[11].D = en_feedback*feedback[10]
                 + /en_feedback*feedback[11] ;  "(2 terms, 3 symbols)
feedback[11].CLK = ck ;  "(1 term, 1 symbol)
feedback[11].RESET = vreset ;  "(1 term, 1 symbol)

feedback[10].D = en_feedback*feedback[9]
                 + /en_feedback*feedback[10] ;  "(2 terms, 3 symbols)
feedback[10].CLK = ck ;  "(1 term, 1 symbol)
feedback[10].RESET = vreset ;  "(1 term, 1 symbol)

feedback[9].D = en_feedback*feedback[8]
                 + /en_feedback*feedback[9] ;  "(2 terms, 3 symbols)
feedback[9].CLK = ck ;  "(1 term, 1 symbol)
feedback[9].RESET = vreset ;  "(1 term, 1 symbol)

feedback[8].D = en_feedback*feedback[7]
                 + /en_feedback*feedback[8] ;  "(2 terms, 3 symbols)
feedback[8].CLK = ck ;  "(1 term, 1 symbol)
feedback[8].RESET = vreset ;  "(1 term, 1 symbol)

feedback[7].D = en_feedback*feedback[6]
                 + /en_feedback*feedback[7] ;  "(2 terms, 3 symbols)
feedback[7].CLK = ck ;  "(1 term, 1 symbol)
feedback[7].RESET = vreset ;  "(1 term, 1 symbol)

feedback[6].D = en_feedback*feedback[5]
                 + /en_feedback*feedback[6] ;  "(2 terms, 3 symbols)
feedback[6].CLK = ck ;  "(1 term, 1 symbol)
feedback[6].RESET = vreset ;  "(1 term, 1 symbol)

feedback[5].D = en_feedback*feedback[4]
                 + /en_feedback*feedback[5] ;  "(2 terms, 3 symbols)
feedback[5].CLK = ck ;  "(1 term, 1 symbol)
feedback[5].RESET = vreset ;  "(1 term, 1 symbol)

feedback[4].D = en_feedback*feedback[3]
                 + /en_feedback*feedback[4] ;  "(2 terms, 3 symbols)
feedback[4].CLK = ck ;  "(1 term, 1 symbol)
feedback[4].RESET = vreset ;  "(1 term, 1 symbol)

feedback[3].D = en_feedback*feedback[2]
                 + /en_feedback*feedback[3] ;  "(2 terms, 3 symbols)
feedback[3].CLK = ck ;  "(1 term, 1 symbol)
feedback[3].RESET = vreset ;  "(1 term, 1 symbol)

feedback[2].D = en_feedback*feedback[1]
                 + /en_feedback*feedback[2] ;  "(2 terms, 3 symbols)
feedback[2].CLK = ck ;  "(1 term, 1 symbol)
feedback[2].RESET = vreset ;  "(1 term, 1 symbol)

feedback[1].D = en_feedback*feedback[0]
                 + /en_feedback*feedback[1] ;  "(2 terms, 3 symbols)
feedback[1].CLK = ck ;  "(1 term, 1 symbol)
feedback[1].RESET = vreset ;  "(1 term, 1 symbol)

feedback[0].D = en_feedback*feedback_in
                 + /en_feedback*feedback[0] ;  "(2 terms, 3 symbols)
feedback[0].CLK = ck ;  "(1 term, 1 symbol)
feedback[0].RESET = vreset ;  "(1 term, 1 symbol)

en_feedback.D = 1 ;  "(1 term, 0 symbols)
en_feedback.CLK = start ;  "(1 term, 1 symbol)
en_feedback.RESET = count22
                 + vreset ;  "(2 terms, 2 symbols)

db[15].EQN = a[1]*feedback[15]*/vsr_high*/vsr_low
                 + sr[15]*vsr_low ;  "(2 terms, 5 symbols)
db[15].OE = dboe ;  "(1 term, 1 symbol)

db[14].EQN = a[1]*feedback[14]*/vsr_high*/vsr_low
                 + sr[14]*vsr_low ;  "(2 terms, 5 symbols)
db[14].OE = dboe ;  "(1 term, 1 symbol)

db[13].EQN = a[1]*feedback[13]*/vsr_high*/vsr_low
                 + sr[13]*vsr_low ;  "(2 terms, 5 symbols)
db[13].OE = dboe ;  "(1 term, 1 symbol)

db[12].EQN = a[1]*feedback[12]*/vsr_high*/vsr_low
                 + sr[12]*vsr_low ;  "(2 terms, 5 symbols)
db[12].OE = dboe ;  "(1 term, 1 symbol)

db[11].EQN = a[1]*feedback[11]*/vsr_high*/vsr_low
                 + sr[11]*vsr_low ;  "(2 terms, 5 symbols)
db[11].OE = dboe ;  "(1 term, 1 symbol)

db[10].EQN = a[1]*feedback[10]*/vsr_high*/vsr_low
                 + sr[10]*vsr_low ;  "(2 terms, 5 symbols)
db[10].OE = dboe ;  "(1 term, 1 symbol)

db[9].EQN = a[1]*feedback[9]*/vsr_high*/vsr_low
                 + sr[9]*vsr_low ;  "(2 terms, 5 symbols)
db[9].OE = dboe ;  "(1 term, 1 symbol)

db[8].EQN = a[1]*feedback[8]*/vsr_high*/vsr_low
                 + sr[8]*vsr_low ;  "(2 terms, 5 symbols)
db[8].OE = dboe ;  "(1 term, 1 symbol)

db[7].EQN = a[1]*feedback[7]*/vsr_high*/vsr_low
                 + sr[7]*vsr_low ;  "(2 terms, 5 symbols)
db[7].OE = dboe ;  "(1 term, 1 symbol)

db[6].EQN = a[1]*feedback[6]*/vsr_high*/vsr_low
                 + sr[6]*vsr_low ;  "(2 terms, 5 symbols)
db[6].OE = dboe ;  "(1 term, 1 symbol)

db[5].EQN = a[1]*feedback[5]*/vsr_high*/vsr_low
                 + sr[5]*vsr_low ;  "(2 terms, 5 symbols)
db[5].OE = dboe ;  "(1 term, 1 symbol)

db[4].EQN = a[1]*feedback[4]*/vsr_high*/vsr_low
                 + ch0*vsr_high*/vsr_low
                 + sr[4]*vsr_low ;  "(3 terms, 6 symbols)
db[4].OE = dboe ;  "(1 term, 1 symbol)

db[3].EQN = a[1]*feedback[3]*/vsr_high*/vsr_low
                 + /a[1]*feedback[19]*/vsr_high*
                     /vsr_low
                 + sr[19]*vsr_high*/vsr_low
                 + sr[3]*vsr_low ;  "(4 terms, 7 symbols)
db[3].OE = dboe ;  "(1 term, 1 symbol)

db[2].EQN = a[1]*feedback[2]*/vsr_high*/vsr_low
                 + /a[1]*feedback[18]*/vsr_high*
                     /vsr_low
                 + sr[18]*vsr_high*/vsr_low
                 + sr[2]*vsr_low ;  "(4 terms, 7 symbols)
db[2].OE = dboe ;  "(1 term, 1 symbol)

db[1].EQN = a[1]*feedback[1]*/vsr_high*/vsr_low
                 + /a[1]*feedback[17]*/vsr_high*
                     /vsr_low
                 + sr[17]*vsr_high*/vsr_low
                 + sr[1]*vsr_low ;  "(4 terms, 7 symbols)
db[1].OE = dboe ;  "(1 term, 1 symbol)

db[0].EQN = a[1]*feedback[0]*/vsr_high*/vsr_low
                 + /a[1]*feedback[16]*/vsr_high*
                     /vsr_low
                 + sr[0]*vsr_low
                 + sr[16]*vsr_high*/vsr_low ;  "(4 terms, 7 symbols)
db[0].OE = dboe ;  "(1 term, 1 symbol)

dboe.EQN = a[1]*a[2]*/a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK*/rd
                 + /a[1]*/a[2]*a[3]*/a[4]*/a[5]*/a[6]*
                     /a[7]*addr_OK*am_OK*/rd
                 + /rd*vsr_high
                 + /rd*vsr_low ;  "(4 terms, 12 symbols)

q1.D = 1 ;  "(1 term, 0 symbols)
q1.CLK = vstart ;  "(1 term, 1 symbol)
q1.RESET = count22
                 + vreset ;  "(2 terms, 2 symbols)

q2.D = q1 ;  "(1 term, 1 symbol)
q2.CLK = ck ;  "(1 term, 1 symbol)
q2.RESET = count22
                 + vreset ;  "(2 terms, 2 symbols)

start.D = q2 ;  "(1 term, 1 symbol)
start.CLK = ck ;  "(1 term, 1 symbol)
start.RESET = count23
                 + vreset ;  "(2 terms, 2 symbols)

hloaden.D = 1 ;  "(1 term, 0 symbols)
hloaden.CLK = vhloaden ;  "(1 term, 1 symbol)
hloaden.RESET = vreset ;  "(1 term, 1 symbol)

sr[19].D = db[3]*vsr_high*/vsr_low
                 + sr[19]*/vsr_high
                 + sr[19]*vsr_low ;  "(3 terms, 4 symbols)
sr[19].RESET = vreset ;  "(1 term, 1 symbol)
sr[19].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[18].D = db[2]*vsr_high*/vsr_low
                 + sr[18]*/vsr_high
                 + sr[18]*vsr_low ;  "(3 terms, 4 symbols)
sr[18].RESET = vreset ;  "(1 term, 1 symbol)
sr[18].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[17].D = db[1]*vsr_high*/vsr_low
                 + sr[17]*/vsr_high
                 + sr[17]*vsr_low ;  "(3 terms, 4 symbols)
sr[17].RESET = vreset ;  "(1 term, 1 symbol)
sr[17].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[16].D = db[0]*vsr_high*/vsr_low
                 + sr[16]*/vsr_high
                 + sr[16]*vsr_low ;  "(3 terms, 4 symbols)
sr[16].RESET = vreset ;  "(1 term, 1 symbol)
sr[16].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[15].D = db[15]*vsr_low
                 + sr[15]*/vsr_low ;  "(2 terms, 3 symbols)
sr[15].RESET = vreset ;  "(1 term, 1 symbol)
sr[15].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[14].D = db[14]*vsr_low
                 + sr[14]*/vsr_low ;  "(2 terms, 3 symbols)
sr[14].RESET = vreset ;  "(1 term, 1 symbol)
sr[14].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[13].D = db[13]*vsr_low
                 + sr[13]*/vsr_low ;  "(2 terms, 3 symbols)
sr[13].RESET = vreset ;  "(1 term, 1 symbol)
sr[13].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[12].D = db[12]*vsr_low
                 + sr[12]*/vsr_low ;  "(2 terms, 3 symbols)
sr[12].RESET = vreset ;  "(1 term, 1 symbol)
sr[12].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[11].D = db[11]*vsr_low
                 + sr[11]*/vsr_low ;  "(2 terms, 3 symbols)
sr[11].RESET = vreset ;  "(1 term, 1 symbol)
sr[11].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[10].D = db[10]*vsr_low
                 + sr[10]*/vsr_low ;  "(2 terms, 3 symbols)
sr[10].RESET = vreset ;  "(1 term, 1 symbol)
sr[10].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[9].D = db[9]*vsr_low
                 + sr[9]*/vsr_low ;  "(2 terms, 3 symbols)
sr[9].RESET = vreset ;  "(1 term, 1 symbol)
sr[9].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[8].D = db[8]*vsr_low
                 + sr[8]*/vsr_low ;  "(2 terms, 3 symbols)
sr[8].RESET = vreset ;  "(1 term, 1 symbol)
sr[8].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[7].D = db[7]*vsr_low
                 + sr[7]*/vsr_low ;  "(2 terms, 3 symbols)
sr[7].RESET = vreset ;  "(1 term, 1 symbol)
sr[7].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[6].D = db[6]*vsr_low
                 + sr[6]*/vsr_low ;  "(2 terms, 3 symbols)
sr[6].RESET = vreset ;  "(1 term, 1 symbol)
sr[6].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[5].D = db[5]*vsr_low
                 + sr[5]*/vsr_low ;  "(2 terms, 3 symbols)
sr[5].RESET = vreset ;  "(1 term, 1 symbol)
sr[5].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[4].D = db[4]*vsr_low
                 + sr[4]*/vsr_low ;  "(2 terms, 3 symbols)
sr[4].RESET = vreset ;  "(1 term, 1 symbol)
sr[4].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[3].D = db[3]*vsr_low
                 + sr[3]*/vsr_low ;  "(2 terms, 3 symbols)
sr[3].RESET = vreset ;  "(1 term, 1 symbol)
sr[3].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[2].D = db[2]*vsr_low
                 + sr[2]*/vsr_low ;  "(2 terms, 3 symbols)
sr[2].RESET = vreset ;  "(1 term, 1 symbol)
sr[2].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[1].D = db[1]*vsr_low
                 + sr[1]*/vsr_low ;  "(2 terms, 3 symbols)
sr[1].RESET = vreset ;  "(1 term, 1 symbol)
sr[1].CLK(~) = db_clk ;  "(1 term, 1 symbol)

sr[0].D = db[0]*vsr_low
                 + sr[0]*/vsr_low ;  "(2 terms, 3 symbols)
sr[0].RESET = vreset ;  "(1 term, 1 symbol)
sr[0].CLK(~) = db_clk ;  "(1 term, 1 symbol)

ch0.T = ch0*/db[4]*rd*vsr_high*/vsr_low
                 + /ch0*db[4]*rd*vsr_high*/vsr_low ;  "(2 terms, 5 symbols)
ch0.RESET = vreset ;  "(1 term, 1 symbol)
ch0.CLK(~) = db_clk ;  "(1 term, 1 symbol)

data.EQN = /count[0]*count[1]*count[2]*/count[3]*
                     /count[4]*/rd*sr[14]*start
                 + /count[0]*count[1]*/count[2]*
                     count[3]*/count[4]*/rd*sr[10]*start
                 + /count[0]*count[1]*/count[2]*
                     /count[3]*count[4]*/rd*sr[2]*start
                 + /count[0]*count[1]*/count[2]*
                     /count[3]*/count[4]*/rd*sr[18]*start
                 + /count[0]*/count[1]*count[2]*
                     count[3]*/count[4]*/rd*sr[8]*start
                 + /count[0]*/count[1]*count[2]*
                     /count[3]*count[4]*/rd*sr[0]*start
                 + /count[0]*/count[1]*count[2]*
                     /count[3]*/count[4]*/rd*sr[16]*start
                 + /count[0]*/count[1]*/count[2]*
                     count[3]*/count[4]*/rd*sr[12]*start
                 + /count[0]*/count[1]*/count[2]*
                     /count[3]*count[4]*/rd*sr[4]*start
                 + data-int0 ;  "(10 terms, 17 symbols)

count[4].CLK = ck ;  "(1 term, 1 symbol)
count[4].CE = start ;  "(1 term, 1 symbol)
count[4].RESET = /start
                 + vreset ;  "(2 terms, 2 symbols)
count[4].XORL = count[4] ;  "(1 term, 1 symbol)
count[4].XORR = count[0]*count[1]*count[2]*count[3] ;  "(1 term, 4 symbols)

count[3].CLK = ck ;  "(1 term, 1 symbol)
count[3].CE = start ;  "(1 term, 1 symbol)
count[3].RESET = /start
                 + vreset ;  "(2 terms, 2 symbols)
count[3].XORL = count[3] ;  "(1 term, 1 symbol)
count[3].XORR = count[0]*count[1]*count[2] ;  "(1 term, 3 symbols)

count[2].CLK = ck ;  "(1 term, 1 symbol)
count[2].CE = start ;  "(1 term, 1 symbol)
count[2].RESET = /start
                 + vreset ;  "(2 terms, 2 symbols)
count[2].XORL = count[2] ;  "(1 term, 1 symbol)
count[2].XORR = count[0]*count[1] ;  "(1 term, 2 symbols)

count[1].D = count[0]*/count[1]
                 + /count[0]*count[1] ;  "(2 terms, 2 symbols)
count[1].CLK = ck ;  "(1 term, 1 symbol)
count[1].CE = start ;  "(1 term, 1 symbol)
count[1].RESET = /start
                 + vreset ;  "(2 terms, 2 symbols)

count[0].D = /count[0] ;  "(1 term, 1 symbol)
count[0].CLK = ck ;  "(1 term, 1 symbol)
count[0].CE = start ;  "(1 term, 1 symbol)
count[0].RESET = /start
                 + vreset ;  "(2 terms, 2 symbols)

count22.EQN = count[0]*/count[1]*count[2]*/count[3]*
                     count[4] ;  "(1 term, 5 symbols)

count23.EQN = /count[0]*count[1]*count[2]*/count[3]*
                     count[4] ;  "(1 term, 5 symbols)

data-int0.EQN = count[0]*count[1]*count[2]*count[3]*
                     /count[4]*/rd*sr[5]*start
                 + count[0]*count[1]*count[2]*
                     /count[3]*/count[4]*/rd*sr[13]*start
                 + count[0]*count[1]*/count[2]*
                     count[3]*/count[4]*/rd*sr[9]*start
                 + count[0]*count[1]*/count[2]*
                     /count[3]*count[4]*/rd*sr[1]*start
                 + count[0]*count[1]*/count[2]*
                     /count[3]*/count[4]*/rd*sr[17]*start
                 + count[0]*/count[1]*count[2]*
                     count[3]*/count[4]*/rd*sr[7]*start
                 + count[0]*/count[1]*count[2]*
                     /count[3]*/count[4]*/rd*sr[15]*start
                 + count[0]*/count[1]*/count[2]*
                     count[3]*/count[4]*/rd*sr[11]*start
                 + count[0]*/count[1]*/count[2]*
                     /count[3]*count[4]*/rd*sr[3]*start
                 + count[0]*/count[1]*/count[2]*
                     /count[3]*/count[4]*/rd*sr[19]*start
                 + /count[0]*count[1]*count[2]*
                     count[3]*/count[4]*/rd*sr[6]*start ;  "(11 terms, 18 symbols)

PLDocument:  Y:\clock\zeus\helix\2ch\helix2.doc
                  SOLUTIONS  Tue May 23 15:55:22 2000


 PARTITIONING CRITERIA : 


WEIGHT PRICE 10 ;

TEMPLATE = MV192_104  ;






PARTITIONING SOLUTIONS : 

==> Solution  1: MV192_104 



FUSEMAP FILES FOR SOLUTION 1: 

  Device 1 (MV192_104) : Y:\clock\zeus\helix\2ch\helix2.j1

PLDocument:  Y:\clock\zeus\helix\2ch\helix2.doc
                  PINOUT DIAGRAMS  Tue May 23 15:55:22 2000


             Device  1 - MV192_104 -- Pinout for QFP package

+-------+------+----------------------+ +-------+------+----------------------+ 
|  Pin  | Type |        Signal        | |  Pin  | Type |        Signal        |
+-------+------+----------------------+ +-------+------+----------------------+ 
|    1  |Jtag  |                      | |   51  |Biput |                      |
|    2  |Biput |  trig_sd             | |   52  |Biput |                      |
|    3  |Biput |  data                | |   53  |Vcc   |                      |
|    4  |Biput |  feedback_in         | |   54  |GND   |                      |
|    5  |Biput |                      | |   55  |GND   |                      |
|    6  |Biput |  clock               | |   56  |Vcc   |                      |
|    7  |GND   |                      | |   57  |Biput |                      |
|    8  |Biput |  load0               | |   58  |Biput |                      |
|    9  |Biput |  load1               | |   59  |Biput |                      |
|   10  |Biput |  hreset              | |   60  |Biput |                      |
|   11  |Biput |                      | |   61  |Biput |                      |
|   12  |GND   |                      | |   62  |Biput |                      |
|   13  |Biput |  dl0                 | |   63  |GND   |                      |
|   14  |Biput |                      | |   64  |Biput |                      |
|   15  |Biput |                      | |   65  |Biput |                      |
|   16  |Biput |  dl2                 | |   66  |Biput |                      |
|   17  |In/CLK|  dl1                 | |   67  |Biput |                      |
|   18  |Vcc   |                      | |   68  |Biput |  ab[1]               |
|   19  |GND   |                      | |   69  |Biput |  ab[2]               |
|   20  |In/CLK|  ck                  | |   70  |Biput |  ab[3]               |
|   21  |Biput |  LOW-VALUE           | |   71  |Vcc   |                      |
|   22  |Biput |  not_reset           | |   72  |GND   |                      |
|   23  |Biput |                      | |   73  |Jtag  |                      |
|   24  |Biput |  trig                | |   74  |Biput |  ab[4]               |
|   25  |GND   |                      | |   75  |Biput |  ab[5]               |
|   26  |Biput |                      | |   76  |Biput |  ab[6]               |
|   27  |Biput |                      | |   77  |Biput |  ab[7]               |
|   28  |Biput |                      | |   78  |Biput |  ab[16]              |
|   29  |Biput |                      | |   79  |GND   |                      |
|   30  |GND   |                      | |   80  |Biput |  ab[17]              |
|   31  |Biput |  ack                 | |   81  |Biput |  ab[18]              |
|   32  |Biput |  errorled            | |   82  |Biput |  ab[19]              |
|   33  |Biput |                      | |   83  |Biput |  ab[20]              |
|   34  |Biput |                      | |   84  |GND   |                      |
|   35  |Biput |  sreset              | |   85  |Biput |  ab[21]              |
|   36  |Jtag  |                      | |   86  |Biput |  ab[22]              |
|   37  |GND   |                      | |   87  |Biput |  ab[23]              |
|   38  |Vcc   |                      | |   88  |Biput |  amb[5]              |
|   39  |Biput |                      | |   89  |In/CLK|                      |
|   40  |Biput |                      | |   90  |Vcc   |                      |
|   41  |Biput |                      | |   91  |GND   |                      |
|   42  |Biput |                      | |   92  |In/CLK|                      |
|   43  |Biput |                      | |   93  |Biput |  amb[4]              |
|   44  |Biput |                      | |   94  |Biput |  amb[3]              |
|   45  |Biput |                      | |   95  |Biput |  amb[1]              |
|   46  |GND   |                      | |   96  |Biput |  amb[0]              |
|   47  |Biput |                      | |   97  |GND   |                      |
|   48  |Biput |                      | |   98  |Biput |  iackb               |
|   49  |Biput |                      | |   99  |Biput |  writeb              |
|   50  |Biput |                      | |  100  |Biput |  lwordb              |
+-------+------+----------------------+ +-------+------+----------------------+ 


             Device  1 - MV192_104 -- Pinout for QFP package (continued)

+-------+------+----------------------+ +-------+------+----------------------+ 
|  Pin  | Type |        Signal        | |  Pin  | Type |        Signal        |
+-------+------+----------------------+ +-------+------+----------------------+ 
|  101  |Biput |  ds0b                | |  123  |Biput |  db[1]               |
|  102  |GND   |                      | |  124  |Biput |  db[0]               |
|  103  |Biput |  ds1b                | |  125  |Vcc   |                      |
|  104  |Biput |  berrb               | |  126  |GND   |                      |
|  105  |Biput |  db[15]              | |  127  |GND   |                      |
|  106  |Biput |  db[14]              | |  128  |Vcc   |                      |
|  107  |Biput |  db[13]              | |  129  |Biput |  db_le               |
|  108  |Jtag  |                      | |  130  |Biput |  wr                  |
|  109  |GND   |                      | |  131  |Biput |  rd                  |
|  110  |Vcc   |                      | |  132  |Biput |  oeout               |
|  111  |Biput |  db[12]              | |  133  |Biput |  oein                |
|  112  |Biput |  db[11]              | |  134  |Biput |  base_addr[16]       |
|  113  |Biput |  db[10]              | |  135  |GND   |                      |
|  114  |Biput |  db[9]               | |  136  |Biput |  base_addr[17]       |
|  115  |Biput |  db[8]               | |  137  |Biput |  base_addr[18]       |
|  116  |Biput |  db[7]               | |  138  |Biput |  base_addr[19]       |
|  117  |Biput |  db[6]               | |  139  |Biput |  base_addr[20]       |
|  118  |GND   |                      | |  140  |Biput |  base_addr[21]       |
|  119  |Biput |  db[5]               | |  141  |Biput |  base_addr[22]       |
|  120  |Biput |  db[4]               | |  142  |Biput |  base_addr[23]       |
|  121  |Biput |  db[3]               | |  143  |Vcc   |                      |
|  122  |Biput |  db[2]               | |  144  |GND   |                      |
+-------+------+----------------------+ +-------+------+----------------------+ 


DEVICE SELECTION: 

      Device         Man  Fam Pack Temp   ICC     TPD     Fmax    Price   User

 1) M5A-192/104-10VC AMD V3.3 TQFP COM   180.0ma  12.0ns  72.0MHz $  0.00   0 0
 2) M5A-192/104-10VI AMD V3.3 TQFP EXT   180.0ma  12.0ns  72.0MHz $  0.00   0 0
 3) M5A-192/104-12VC AMD V3.3 TQFP COM   180.0ma  14.0ns  60.0MHz $  0.00   0 0
 4) M5A-192/104-12VI AMD V3.3 TQFP EXT   180.0ma  14.0ns  60.0MHz $  0.00   0 0
 5) M5A-192/104-15VI AMD V3.3 TQFP EXT   180.0ma  16.0ns  62.5MHz $  0.00   0 0
 6) M5A-192/104-5VC  AMD V3.3 TQFP COM   180.0ma   7.5ns 142.0MHz $  0.00   0 0
 7) M5A-192/104-7VC  AMD V3.3 TQFP COM   180.0ma  10.0ns  88.0MHz $  0.00   0 0
 8) M5A-192/104-7VI  AMD V3.3 TQFP EXT   180.0ma  10.0ns  88.0MHz $  0.00   0 0
 9) M5-192/104-15YC  AMD CMOS QFP  COM   180.0ma  18.0ns  55.0MHz $ 23.17   0 0
10) M5-192/104-20YI  AMD CMOS QFP  EXT   162.0ma  22.0ns  45.5MHz $ 24.39   0 0
11) M5-192/104-12YC  AMD CMOS QFP  COM   235.0ma  14.0ns  71.0MHz $ 27.81   0 0
12) M5-192/104-15YI  AMD CMOS QFP  EXT   180.0ma  18.0ns  55.0MHz $ 29.26   0 0
13) M5-192/104-10YC  AMD CMOS QFP  COM   275.0ma  11.5ns  87.0MHz $ 34.76   0 0
14) M5-192/104-12YI  AMD CMOS QFP  EXT   235.0ma  14.0ns  71.0MHz $ 36.58   0 0
==> M5-192/104-7YC   AMD CMOS QFP  COM   300.0ma   9.5ns 105.0MHz $ 46.35   0 0
16) M5-192/104-10YI  AMD CMOS QFP  EXT   275.0ma  11.5ns  87.0MHz $ 48.77   0 0
PLDocument:  Y:\clock\zeus\helix\2ch\helix2.doc
                  WIRELIST  Tue May 23 15:55:23 2000

  +------------------+-------------------+-------+
  |      Signal      |       Device      |  Pin  |
  +------------------+-------------------+-------+
  | LOW-VALUE        | MV192_104_1       |   21  |
  | sreset           | MV192_104_1       |   35  |
  | lwordb           | MV192_104_1       |  100  |
  | writeb           | MV192_104_1       |   99  |
  | berrb            | MV192_104_1       |  104  |
  | ds0b             | MV192_104_1       |  101  |
  | ds1b             | MV192_104_1       |  103  |
  | iackb            | MV192_104_1       |   98  |
  | amb[5]           | MV192_104_1       |   88  |
  | amb[4]           | MV192_104_1       |   93  |
  | amb[3]           | MV192_104_1       |   94  |
  | amb[1]           | MV192_104_1       |   95  |
  | amb[0]           | MV192_104_1       |   96  |
  | ab[23]           | MV192_104_1       |   87  |
  | ab[22]           | MV192_104_1       |   86  |
  | ab[21]           | MV192_104_1       |   85  |
  | ab[20]           | MV192_104_1       |   83  |
  | ab[19]           | MV192_104_1       |   82  |
  | ab[18]           | MV192_104_1       |   81  |
  | ab[17]           | MV192_104_1       |   80  |
  | ab[16]           | MV192_104_1       |   78  |
  | ab[7]            | MV192_104_1       |   77  |
  | ab[6]            | MV192_104_1       |   76  |
  | ab[5]            | MV192_104_1       |   75  |
  | ab[4]            | MV192_104_1       |   74  |
  | ab[3]            | MV192_104_1       |   70  |
  | ab[2]            | MV192_104_1       |   69  |
  | ab[1]            | MV192_104_1       |   68  |
  | dl0              | MV192_104_1       |   13  |
  | ack              | MV192_104_1       |   31  |
  | dl1              | MV192_104_1       |   17  |
  | dl2              | MV192_104_1       |   16  |
  | base_addr[23]    | MV192_104_1       |  142  |
  | base_addr[22]    | MV192_104_1       |  141  |
  | base_addr[21]    | MV192_104_1       |  140  |
  | base_addr[20]    | MV192_104_1       |  139  |
  | base_addr[19]    | MV192_104_1       |  138  |
  | base_addr[18]    | MV192_104_1       |  137  |
  | base_addr[17]    | MV192_104_1       |  136  |
  | base_addr[16]    | MV192_104_1       |  134  |
  | oein             | MV192_104_1       |  133  |
  | oeout            | MV192_104_1       |  132  |
  | db_le            | MV192_104_1       |  129  |
  | wr               | MV192_104_1       |  130  |
  | rd               | MV192_104_1       |  131  |
  | errorled         | MV192_104_1       |   32  |
  | ck               | MV192_104_1       |   20  |
  | trig             | MV192_104_1       |   24  |
  | not_reset        | MV192_104_1       |   22  |
  | clock            | MV192_104_1       |    6  |
  | trig_sd          | MV192_104_1       |    2  |
  +------------------+-------------------+-------+


  +------------------+-------------------+-------+
  |      Signal      |       Device      |  Pin  |
  +------------------+-------------------+-------+
  | load0            | MV192_104_1       |    8  |
  | load1            | MV192_104_1       |    9  |
  | hreset           | MV192_104_1       |   10  |
  | db[15]           | MV192_104_1       |  105  |
  | db[14]           | MV192_104_1       |  106  |
  | db[13]           | MV192_104_1       |  107  |
  | db[12]           | MV192_104_1       |  111  |
  | db[11]           | MV192_104_1       |  112  |
  | db[10]           | MV192_104_1       |  113  |
  | db[9]            | MV192_104_1       |  114  |
  | db[8]            | MV192_104_1       |  115  |
  | db[7]            | MV192_104_1       |  116  |
  | db[6]            | MV192_104_1       |  117  |
  | db[5]            | MV192_104_1       |  119  |
  | db[4]            | MV192_104_1       |  120  |
  | db[3]            | MV192_104_1       |  121  |
  | db[2]            | MV192_104_1       |  122  |
  | db[1]            | MV192_104_1       |  123  |
  | db[0]            | MV192_104_1       |  124  |
  | data             | MV192_104_1       |    3  |
  | feedback_in      | MV192_104_1       |    4  |
  +------------------+-------------------+-------+