SCT/Pixel TIM-BOC Interface Specification

September 29, 2000

Draft 0.7 by John Lane

Abstract

This document is a preliminary draft of the SCT/Pixel interface specification between TIM and BOC. Feedback is welcome.

Introduction

The TTC Interface Module (TIM) distributes the Bunch Crossing clock to the back-of-crate (BOC) optocards within a ROD crate via a custom backplane.

This specification should satisfy the interface requirements set out in the BOC requirements document [ref. BOC_requirements] and the TIM requirements document [ref. TIM_requirements]. Pin assignments and other details are given in the backplane specification [ref. ROD_backplane].

Signals

The TIM transmits the following signals to each BOC slot:

Name Level Description
CLK+
CLK- PECL single balanced differential pair forming CLK (40 MHz BC clock)

Name	Level	Description
CLK+ CLK-	PECL	single balanced differential pair forming CLK (40 MHz BC clock)

Differential PECL facilitates low jitter.

Timing

The clock should arrive at each slot at the same time.
The CLK+/CLK- pair delivered by the TIM to each BOC slot should meet the clock input requirements for BOC. The BOC specifications for clock jitter, long-term stability, duty cycle, edge rate, etc, are driven by the input requirements of the front-end chips. The BOC could have a phase-locked loop to meet these requirements.
The clock specification for the BOC is sufficient for the ROD. The BOC passes a buffered copy of the clock on to its ROD.

Electrical Notes

The clock is distributed point-to-point by paths of equal length: the CLK+/CLK- pair at each BOC slot is routed from a separate pair of pins on the TIM slot.
Each CLK+/CLK- pair is terminated on the BOC by a resistor between CLK+ and CLK- (unoccupied BOC slots lack termination for CLK+/CLK-).
The TIM should use PECL drivers with moderate edge rates for CLK+/CLK- to minimize reflections from connectors.
Load resistors for the CLK+/CLK- driver are located at the driver.

References

On the Web via:  ATLAS -> Inner Detector -> SCT -> Off Detector

ROD_backplane    Off Detector -> ROD crate backplane
BOC_requirements Off Detector -> BOC
TIM_requirements http://www.hep.ucl.ac.uk/~jbl/SCT/TIM_requirements.html

History:

0.1 29Apr98 UCI First draft
0.3 11Nov98 UCI http://positron.ps.uci.edu/~pier/ROD/pdf/RODtofromTTC1.PDF
0.4 29Jul99 JBL New version, separating BOC from ROD
0.5  9Dec99 JBL Update References
0.6 21Jul00 JBL Update References
0.7 29Sep00 JBL Update References; Pixel too
    22Jun04 JBL Remove broken off-detector link

Last update: 22 June 2004 by John Lane (UCL) email: jbl@hep.ucl.ac.uk

http://www.hep.ucl.ac.uk/~jbl/SCT/TIM_interface_BOC.html