SOME NOTES ON DESIGN AND FUNCTIONALITY OF THE ============================================= ATLAS-SCT "C&C FANOUT MODULE" FOR SYSTEM AND BEAM TEST0 PHASE ============================================================= Martin Postranecky, UCL, 06 September 1998 ------------------------------------------ 1) a) the C&C FANOUT is a single width, 6U, PC card, with : VME J1 & J2 connectors, VME JAUX ( not soldered in ) -5V2/2A supply required ( see below for details ) NOTE : The C&C FANOUT is NOT a VME module - it connects to ====== the VME backplane purely to obtain power and ground b) it connects to the C&C MASTER via a single, front-edge, 10-pin IDC connector J10, with all signals being differential ECL pairs ( see below for details ) c) it connects to up to three MuSTARD modules via the three front-edge, 10-pin IDC connectors "MuSTARD-A-OUT", "MuSTARD-B-OUT" and "MuSTARD-C-OUT" ( J15, J16 and J17 ), with all signals being differential ECL pairs ( see below for details ) d) it connects to up to four OXFORD C&C DRIVER modules via the four inset, PCB-mounted, 10-pin IDC connectors "OXFORD-A-OUT", "OXFORD-B-OUT", "OXFORD-C-OUT" and "OXFORD-D-OUT" ( J11, J12, J13 and J14 ), with all signals being differential ECL pairs ( see below for details ) e) All three "BUSY IN" inputs from MuSTARDs ( via J14, J15 and J17 connectors ) are "OR-ed" together before being output on the J10 connector back to the C&C MASTER module f) DIL switch SW1 allows for allows for any unconnected inputs BUSIN5 from J15 ( via SW1/1 ), BUSIN6 from J16 ( via SW1/2 ) and/or BUSIN7 from J17 ( via SW1/3 ) to be tied to Vbb by setting the respective switch levers to "ON" NOTE : REMEMBER TO SET THE APPROPRIATE LEVERS OF SW1 ====== ( 1,2 and/or 3 ) TO "OFF" WHEN THE "NBUSY" INPUTS FROM J15, J16 and/or J17 ARE USED ! Switch SW1/4 should remain set to "ON" at all times g) single LED indicator DS1 shows the presence of -5V2 ( Vee ) supply h) A 24x26 prototyping grid of thru-hole plated holes at 0.1" spacing is provided on this PCB for possible customisation of unsused connector pins /cont.: - 2 - 2) DESCRIPTION OF CONNECTORS : =========================== FRONT-EDGE 10-pin IDC CONNECTORS : ---------------------------------- ( Pin 1 being the one with the "arrow" marker, whichever way up/down the connector is ) All signals are differential ECL pairs a) J10 to/from C&C MASTER module : --------------------------------------------------- Pin 1 BUSY out Pin 2 NBUSY out ( to C&C MASTER ) Pin 3 - Pin 4 - Pin 5 - Pin 6 - Pin 7 CLK in Pin 8 NCLK in ( from C&C MASTER ) Pin 9 DATA in Pin 10 NDATA in b) J11, J12, J13, J14 to OXFORD C7C DRIVER modules : ------------------------------------------------------ Pin 1 - Pin 2 - Pin 3 - Pin 4 - Pin 5 - Pin 6 - Pin 7 CLK out Pin 8 NCLK out Pin 9 DATA out Pin 10 NDATA out c) J15, J16, J17 to/from MuSTARD modules : ------------------------------------------------- Pin 1 BUSY in Pin 2 NBUSY in ( from MuSTARD ) Pin 3 - Pin 4 - Pin 5 - Pin 6 - Pin 7 CLK out Pin 8 NCLK out ( to MuSTARD ) Pin 9 DATA out Pin 10 NDATA out /cont.: - 3 - 3) BACKPLANE CONNECTORS : ---------------------- The C&C FANOUT is NOT a VME module - it connects to the VME backplane purely to obtain power and ground VME backplane connectors J1 and J2 are assembled on this module VME power connector JAUX is not soldered onto this module but supplied loose. If this module is used in CERN-standard VME crates which support the JAUX connector it is recommended that the -5V2 ( Vee ) supply is drawn via this connector ( use links PL6 and PL7 as shown below ) -5V2 ( Vee ) supply : one or more of the following backplane pins --------------------- must be selected by inserting jumpers over link pins on PCB : JAUX/ 9a+b+c PL6 JAUX/10a+b+c PL7 J2/4c PL5 J2/7a PL4 J2/13a PL3 J2/19a PL2 J2/19c PL1 +5V ( Vcc ) supply : J1/32a, 32b, 32c -------------------- Vcc is brought out to five link points LK1 - LK5, but not used elswhere on this module GND : J1/9a, 9c, 11a, 15a, 17a, 19a, 20b, 23b ----- J2/2b, 12b, 22b, 31b JAUX/1b, 2b, 3b, 3c, 4b, 5b, 6b This version, MP-UCL : 06 Sep. 1998 Previous versions : 24 Aug. 1998 25 Mar. 1998 9 Mar. 1998