+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
      Quick netlist/.ucf diff'r by Paul Mealor (mostly)    
        compares a Cadence netlist with a Xilinx ucf       
+++++++++++++++++++++++++++++++++++++++++++++++++++++++++++
Parms: SK1 CERC2_netlist_10-08-04.rpt dummy.rpt

Comparing Cadence Netlist with Xilinx User Constraints File
-----------------------------------------------------------

Checking that all pins are in both lists...

  Pins in Netlist missing from UCF:
    GND - 10 100 101 102 103 104 105 106 107 108 109 11 110 111 112 113 114 12 13 14 15 16 17 18 19 96 97 98 99
    J0_1+ - 29
    J0_1- - 48
    J0_10+ - 38
    J0_10- - 57
    J0_11+ - 67
    J0_11- - 86
    J0_12+ - 68
    J0_12- - 87
    J0_13+ - 69
    J0_13- - 88
    J0_14+ - 70
    J0_14- - 89
    J0_15+ - 71
    J0_15- - 90
    J0_16+ - 72
    J0_16- - 91
    J0_17+ - 73
    J0_17- - 92
    J0_18+ - 74
    J0_18- - 93
    J0_19+ - 75
    J0_19- - 94
    J0_2+ - 30
    J0_2- - 49
    J0_20+ - 76
    J0_20- - 95
    J0_3+ - 31
    J0_3- - 50
    J0_4+ - 32
    J0_4- - 51
    J0_5+ - 33
    J0_5- - 52
    J0_6+ - 34
    J0_6- - 53
    J0_7+ - 35
    J0_7- - 54
    J0_8+ - 36
    J0_8- - 55
    J0_9+ - 37
    J0_9- - 56
    J0_FANOUTA_O - 61
    J0_FANOUTA_OB - 80
    J0_FANOUTB_O - 82
    J0_FANOUTB_OB - 63
    J0_IO_DS0 - 4
    J0_IO_DS0_B - 23
    J0_IO_DS1 - 5
    J0_IO_DS1_B - 24
    J0_IO_DS2 - 25
    J0_IO_DS2_B - 6
    J0_IO_DS3 - 7
    J0_IO_DS3_B - 26
    TEST_CLK - 9
    TEST_CLK_B - 28
    TTS_J0_OUT_OF_SYNC - 62
    TTS_J0_OUT_OF_SYNC_B - 81
    UNNAMED_10_FUSE-SMD_I62_A - 39
    UNNAMED_10_FUSE-SMD_I63_A - 77
    VME_J0_SPARE0 - 66
    VME_J0_SPARE1 - 85


Pins in UCF missing from Netlist:


Checking that all pins are attached to the same net...


Done!