FC7 g-2 Firmware Changelog
--------------------------
Not all versions work ... ;-)
19/02/19 13021300 Pedestal trigger works - 0x02 command sent to the logic board upon pedestal trigger
14/02/19 13020e00 Adding the pedestal trigger (debugged)
17/10/18 120a1100 Adding the pedestal trigger (doesn't work)
23/03/18 12031500 Bug fixes for dealing with muon, laser and async triggers
15/03/18 12030900 Delaying muon trigger to the logic boards (Doesn't work)
28/02/18 12021A00 Bug fixing (triggers, large volume of data)
13/02/18 12020c00 Changing the async trigger code to "00100"
29/01/18 12011d00 Bug fixes
19/01/18 12011200 Added buffering to deal with the async triggers with an event id number FIFO
12/01/18 12010c00 Added buffering to deal with the laser triggers - c5 0x3 command still disabled
02/11/17 110a0a01 Disabled sending C5 command 0x3 to logic boards on a trigger other than muon (DEBUG ONLY)
10/10/17 110a0a00 Proper version mk 2 - really!
29/09/17 11091d02 Proper version, no Chipscope, all TDC links connected
29/09/17 11091d01 used amc13_almost_full to slow DDR access  (DEBUGONLY)
29/09/17 11091d00 Added checks on addresses (didn't work)  (DEBUGONLY)
28/09/17 11091c00 New cs to look as ddr clock domain signals  (DEBUGONLY)
27/09/17 11091b00 added more cs to ddr rdaddr fifo   (DEBUGONLY)
26/09/17 11091a00 fixed the ddr_read_data_addr check   (DEBUGONLY)
25/09/17 11091901 added ddr_read_data_addr check   (DEBUGONLY)
25/09/17 11091900 added even more cs on ddr sigs   (DEBUGONLY)
15/09/17 11090f00 removed belows extra stage, added more cs on ddr sigs   (DEBUGONLY)
14/09/17 11090e00 added extra ff stage to fifo_read_data and fifo_read_valid  (DEBUGONLY)
13/09/17 11090d00 changed fifo_write_count to actually count fifo writes  (DEBUGONLY)
12/09/17 11090c02 Moved to synchro reset where easily possible  (DEBUGONLY)
12/09/17 11090c01 Rebuild with slight change  (DEBUGONLY)
12/09/17 11090c00 Added a synchroniser to ddr_rd_rdy ... (DEBUGONLY)
11/09/17 11090b01 changed the ddr_check code to make it work ;-)(DEBUGONLY)
                  removed all variables used as adders (DEBUGONLY)
11/09/17 11090b00 moved to unsigned lots more - changed the ddr_addr_check code    (DEBUGONLY)
 8/09/17 11090800 moved the amc_sender to a synchro reset (and tidied some reset code)   (DEBUGONLY)
 7/09/17 11090701 Fixed the monitor - removed some added flow control   (DEBUGONLY)
 7/09/17 11090700 Added ddr_read_addr monitor   (DEBUGONLY)
 6/09/17 11090601 reworked link fifo read a LOT   (DEBUGONLY)
 6/09/17 11090600 fixed(?) missed first word fifo fill  (DEBUGONLY)
 5/09/17 11090500 more rework of FIFO filler sm ...  (DEBUGONLY)
30/08/17 11081e00 reworked sm filling FIFO (didn't work - made things worse)  (DEBUGONLY)
24/08/17 11081801 changed link_fifo filling to ignore amc13 state (DEBUGONLY)
24/08/17 11081800 fixed data_count_global to be ((last_written_ddr_addr(18:3) + 1)*4)(DEBUGONLY)
23/08/17 11081700 Changed the data_count_global to be ((last_written_ddr_addr + 1)*4)(DEBUGONLY)
                   it seems counting fifo writes was not working ... (DEBUGONLY)
22/08/17 11081602 Different CS signals for last DDR addr checking (DEBUGONLY)
22/08/17 11081601 Set fifo prog_full level correctly to 3! (DEBUGONLY)
22/08/17 11081600 Set fifo prog_full level correctly (to max - 2k) (DEBUGONLY) WRONG!
21/08/17 11081501 Increased sender link fifo to 16k (from 4k) (DEBUGONLY)
21/08/17 11081500 small amc13 sender changes and new cs (DEBUGONLY)
18/08/17 11081200 Testing nofix fix + CS focus on AMC13 Sender (DEBUGONLY)
28/07/17 11071400_B Same again with CS added (DEBUGONLY)
                    - same ver because *someone* won't make it a command line option
                      (not even an override????????)(DEBUGONLY)
20/07/17 11071400 Mapped channel 1 onto ALL input channels (=DEBUGONLY)
03/07/17 11070300 Reworked some of the DDR fill machine because it could be reset by a trigger,
                  so now they are only handled when in the IDLE state.
                  Also disabling only works in IDLE.
30/06/17 11061e00 Added amc13_busy_counter register -- address 0x81
                  Made end of FC7 header [Word3(24:0)] = amc13_busy_counter(23:0)                     
23/06/17 11061700 Changed "time_event_sent" to "time_c5_trig_sent" in FC7 Header
                  Made EvCntRes also clear events_sent_counter
12/06/17 11060c00 First attempt at send C5=3 when not a muon trigger
 1/06/17 11060100 Added counters for C5e and C5f sending (TDC0 only)
31/05/17 11051f00 Added counters for ECRs and ACRs
30/05/17 11051e00 Start with Muon TType ("00001") at after reset (well TTCready = 0 actually)
26/05/17 11051a01 Fixed for missed trigger logic, maybe more
26/05/17 11051a00 Attemped to allow triggers in the system
25/05/17 11051901 CS build
25/05/17 11051900 Only evalates trigger-types mode changed when readout is in Idle state
12/04/17 11040c00 Sends "empty" packets for all TTypes except "00001" and "111nn" (FOBP types)
13/03/17 11030d01 Made FOBP packets 4 words longer to match real packet size vs reported size
13/03/17 11030d00 Changed to FOBP, use TType=111nn to select 10k,50k,100k,250k long packets
10/03/17 11030a00 Added SFOBP ttype (11111) to send Serious-F*ck-Off-Big-Packets
21/02/17 15021100 Rebuild after merge with extraneous stuff in git. Untested
17/02/17 11021101 Final? version of ttype registers in header format
                  Longer version of "empty event" packet to AMC - any good? 
16/02/17 11021100 Attempt at empty-event when no channels enabled
15/02/17 0e020c01
14/02/17 0e020c00
13/02/17 17021300