Device Usage Page (device_usage_statistics.html)

This HTML page displays the device usage statistics that will be sent to Xilinx. The file also contains predefined XML tags used to simplify processing.
 
Please verify the contents are okay to send to Xilinx!
 
 
Software Version and Target Device
Product Version: ISE:11.4 (WebPack) Target Family: spartan3
OS Platform: NT64 Target Device: xc3s400
Project ID (random number) 13f11f3ae72e47e49233d2c6f37dd919.f016a90dbc874253afbe92b5fcf9f7b4.2 Target Package: pq208
Registration ID 176524081_0_770 Target Speed: -4
Date Generated Wed Jul 14 06:44:09 2010
 
Device Usage Statistics
Macro StatisticsMiscellaneous StatisticsNet StatisticsSite Usage
FSMs=1 ROMs=1
  • 16x32-bit ROM=1
 Counters=1
  • 28-bit up counter=1
 Registers=18
  • Flip-Flops=18
 Adders/Subtractors=2
  • 4-bit adder=1
  • 5-bit adder=1
 Multiplexers=1
  • 1-bit 32-to-1 multiplexer=1
 		MiscellaneousStatistics
  • AGG_BONDED_IO=47
  • AGG_IO=47
  • AGG_SLICE=73
  • NUM_4_INPUT_LUT=133
  • NUM_BONDED_DIFFM=12
  • NUM_BONDED_DIFFS=12
  • NUM_BONDED_IOB=23
  • NUM_BUFGMUX=2
  • NUM_CYMUX=34
  • NUM_LUT_RT=28
  • NUM_RPM=2
  • NUM_SLICEL=69
  • NUM_SLICEM=4
  • NUM_SLICE_FF=52
  • NUM_XOR=28
 		NetStatistics
  • NumNets_Active=215
  • NumNets_Gnd=1
  • NumNets_Vcc=1
  • NumNodesOfType_Active_CLKPIN=35
  • NumNodesOfType_Active_CNTRLPIN=32
  • NumNodesOfType_Active_DOUBLE=260
  • NumNodesOfType_Active_DUMMY=360
  • NumNodesOfType_Active_DUMMYESC=3
  • NumNodesOfType_Active_GLOBAL=25
  • NumNodesOfType_Active_HUNIHEX=14
  • NumNodesOfType_Active_INPUT=439
  • NumNodesOfType_Active_IOBOUTPUT=3
  • NumNodesOfType_Active_OMUX=157
  • NumNodesOfType_Active_OUTPUT=165
  • NumNodesOfType_Active_PREBXBY=20
  • NumNodesOfType_Active_VFULLHEX=10
  • NumNodesOfType_Active_VLONG=1
  • NumNodesOfType_Active_VUNIHEX=19
  • NumNodesOfType_Vcc_CNTRLPIN=2
  • NumNodesOfType_Vcc_INPUT=4
  • NumNodesOfType_Vcc_PREBXBY=2
  • NumNodesOfType_Vcc_VCCOUT=5
 SiteStatistics
  • IOB-DIFFM=9
  • IOB-DIFFS=8
  • SLICEL-SLICEM=35
 		SiteSummary
  • BUFGMUX=2
  • BUFGMUX_GCLKMUX=2
  • BUFGMUX_GCLK_BUFFER=2
  • DIFFM=12
  • DIFFM_INBUF=3
  • DIFFM_OUTBUF=9
  • DIFFM_PAD=12
  • DIFFS=12
  • DIFFS_DIFFO_IN_USED=9
  • DIFFS_OUTBUF=9
  • DIFFS_PAD=12
  • DIFFS_PADOUT_USED=3
  • IOB=23
  • IOB_OUTBUF=23
  • IOB_PAD=23
  • SLICEL=69
  • SLICEL_C1VDD=1
  • SLICEL_CYMUXF=18
  • SLICEL_CYMUXG=16
  • SLICEL_F=63
  • SLICEL_F5MUX=4
  • SLICEL_F6MUX=3
  • SLICEL_FFX=28
  • SLICEL_FFY=24
  • SLICEL_G=62
  • SLICEL_GNDF=17
  • SLICEL_GNDG=16
  • SLICEL_XORF=14
  • SLICEL_XORG=14
  • SLICEM=4
  • SLICEM_F=4
  • SLICEM_F5MUX=4
  • SLICEM_F6MUX=4
  • SLICEM_G=4
 
Configuration Data
BUFGMUX
  • S=[S_INV:2] [S:0]
 BUFGMUX_GCLKMUX
  • DISABLE_ATTR=[LOW:2]
  • S=[S_INV:2] [S:0]
 DIFFM
  • O1=[O1_INV:0] [O1:9]
 DIFFM_OUTBUF
  • IN=[IN_INV:0] [IN:9]
 DIFFM_PAD
  • IOATTRBOX=[LVDS_25:12]
 DIFFS_PAD
  • IOATTRBOX=[LVDS_25:12]
 IOB
  • O1=[O1_INV:2] [O1:21]
 IOB_OUTBUF
  • IN=[IN_INV:2] [IN:21]
 IOB_PAD
  • DRIVEATTRBOX=[12:23]
  • IOATTRBOX=[LVCMOS25:23]
  • SLEW=[SLOW:23]
 SLICEL
  • BX=[BX_INV:0] [BX:6]
  • BY=[BY:7] [BY_INV:3]
  • CE=[CE:1] [CE_INV:20]
  • CIN=[CIN_INV:0] [CIN:16]
  • CLK=[CLK:18] [CLK_INV:17]
  • SR=[SR:11] [SR_INV:0]
 SLICEL_CYMUXF
  • 0=[0:18] [0_INV:0]
  • 1=[1_INV:0] [1:18]
 SLICEL_CYMUXG
  • 0=[0:16] [0_INV:0]
 SLICEL_F5MUX
  • S0=[S0:4] [S0_INV:0]
 SLICEL_F6MUX
  • S0=[S0:3] [S0_INV:0]
 SLICEL_FFX
  • CE=[CE:0] [CE_INV:19]
  • CK=[CK:14] [CK_INV:14]
  • D=[D:28] [D_INV:0]
  • FFX_INIT_ATTR=[INIT0:22] [INIT1:6]
  • FFX_SR_ATTR=[SRLOW:23] [SRHIGH:5]
  • LATCH_OR_FF=[FF:28]
  • SR=[SR:9] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:28]
 SLICEL_FFY
  • CE=[CE:1] [CE_INV:15]
  • CK=[CK:18] [CK_INV:6]
  • D=[D:21] [D_INV:3]
  • FFY_INIT_ATTR=[INIT0:22] [INIT1:2]
  • FFY_SR_ATTR=[SRLOW:22] [SRHIGH:2]
  • LATCH_OR_FF=[FF:24]
  • SR=[SR:5] [SR_INV:0]
  • SYNC_ATTR=[ASYNC:24]
 SLICEL_XORF
  • 1=[1_INV:0] [1:14]
 SLICEM
  • BX=[BX_INV:0] [BX:4]
  • BY=[BY:4] [BY_INV:0]
 SLICEM_F
  • LUT_OR_MEM=[LUT:4]
 SLICEM_F5MUX
  • S0=[S0:4] [S0_INV:0]
 SLICEM_F6MUX
  • S0=[S0:4] [S0_INV:0]
 SLICEM_G
  • LUT_OR_MEM=[LUT:4]
 
Pin Data
BUFGMUX
  • I0=2
  • O=2
  • S=2
 BUFGMUX_GCLKMUX
  • I0=2
  • OUT=2
  • S=2
 BUFGMUX_GCLK_BUFFER
  • IN=2
  • OUT=2
 DIFFM
  • DIFFI_IN=3
  • DIFFO_OUT=9
  • I=3
  • O1=9
  • PAD=12
 DIFFM_INBUF
  • DIFFI_IN=3
  • OUT=3
  • PAD=3
 DIFFM_OUTBUF
  • IN=9
  • OUTN=9
  • OUTP=9
 DIFFM_PAD
  • PAD=12
 DIFFS
  • DIFFO_IN=9
  • PAD=12
  • PADOUT=3
 DIFFS_DIFFO_IN_USED
  • 0=9
  • OUT=9
 DIFFS_OUTBUF
  • DIFFO_IN=9
  • OUTP=9
 DIFFS_PAD
  • PAD=12
 DIFFS_PADOUT_USED
  • 0=3
  • OUT=3
 IOB
  • O1=23
  • PAD=23
 IOB_OUTBUF
  • IN=23
  • OUT=23
 IOB_PAD
  • PAD=23
 SLICEL
  • BX=6
  • BY=10
  • CE=21
  • CIN=16
  • CLK=35
  • COUT=16
  • F1=63
  • F2=48
  • F3=32
  • F4=24
  • F5=4
  • FX=2
  • FXINA=3
  • FXINB=3
  • G1=62
  • G2=48
  • G3=30
  • G4=20
  • SR=11
  • X=28
  • XB=1
  • XQ=28
  • Y=40
  • YQ=24
 SLICEL_C1VDD
  • 1=1
 SLICEL_CYMUXF
  • 0=18
  • 1=18
  • OUT=18
  • S0=18
 SLICEL_CYMUXG
  • 0=16
  • 1=16
  • OUT=16
  • S0=16
 SLICEL_F
  • A1=63
  • A2=48
  • A3=32
  • A4=24
  • D=63
 SLICEL_F5MUX
  • F=4
  • G=4
  • OUT=4
  • S0=4
 SLICEL_F6MUX
  • 0=3
  • 1=3
  • OUT=3
  • S0=3
 SLICEL_FFX
  • CE=19
  • CK=28
  • D=28
  • Q=28
  • SR=9
 SLICEL_FFY
  • CE=16
  • CK=24
  • D=24
  • Q=24
  • SR=5
 SLICEL_G
  • A1=62
  • A2=48
  • A3=30
  • A4=20
  • D=62
 SLICEL_GNDF
  • 0=17
 SLICEL_GNDG
  • 0=16
 SLICEL_XORF
  • 0=14
  • 1=14
  • O=14
 SLICEL_XORG
  • 0=14
  • 1=14
  • O=14
 SLICEM
  • BX=4
  • BY=4
  • F1=4
  • F2=4
  • F3=4
  • F4=3
  • F5=4
  • FX=4
  • FXINA=4
  • FXINB=4
  • G1=4
  • G2=4
  • G3=4
  • G4=2
 SLICEM_F
  • A1=4
  • A2=4
  • A3=4
  • A4=3
  • D=4
 SLICEM_F5MUX
  • F=4
  • G=4
  • OUT=4
  • S0=4
 SLICEM_F6MUX
  • 0=4
  • 1=4
  • OUT=4
  • S0=4
 SLICEM_G
  • A1=4
  • A2=4
  • A3=4
  • A4=2
  • D=4
 
Tool Usage
Command Line History
  • xst -ise <ise_file>
  • ngdbuild -ise <ise_file> -intstyle ise -dd _ngo -sd src/icon -sd src/ila -nt timestamp -i -p xc3s400-pq208-4 <fname>.ngc <fname>.ngd
  • map -ise <ise_file> -intstyle ise -p xc3s400-pq208-4 -cm area -ir off -pr off -c 100 -o <fname>.ncd <fname>.ngd <fname>.pcf
  • par -ise <ise_file> -w -intstyle ise -ol std -t 1 <fname>.ncd <fname>.ncd <fname>.pcf
  • trce -ise <ise_file> -intstyle ise -v 3 -s 4 -xml <fname>.twx <fname>.ncd -o <fname>.twr <fname>.pcf
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
  • bitgen -ise <ise_file> -intstyle ise -f <fname>.ut <fname>.ncd
 
Software Quality
Run Statistics
_impact 38 34 0 0 0 0 0
bitgen 180 180 0 0 0 0 0
map 189 181 0 0 0 0 0
ngdbuild 193 188 0 0 0 0 0
par 181 179 2 0 0 0 0
trce 179 179 0 0 0 0 0
xst 195 195 0 0 0 0 0
 
Help Statistics
Search words with results
create symbol ( 1 ) symbol pins ( 1 )
xsvf ( 1 )
Help files
/doc/usenglish/isehelp/ise_c_overview.htm ( 1 ) /doc/usenglish/isehelp/ite_c_overview.htm ( 1 )
/doc/usenglish/isehelp/pim_c_file_generation.htm ( 1 ) /doc/usenglish/isehelp/pim_c_overview.htm ( 1 )
/doc/usenglish/isehelp/pim_n_availablebs_operations.htm ( 1 ) /doc/usenglish/isehelp/pim_p_one_step_xsvf.htm ( 1 )
/doc/usenglish/isehelp/pim_r_impactfiles.htm ( 1 ) /doc/usenglish/isehelp/pn_r_design_panel.htm ( 1 )
/doc/usenglish/isehelp/pp_p_process_generate_svf_file.htm ( 1 ) /doc/usenglish/isehelp/pp_p_process_generate_target_prom_ace_file.htm ( 1 )
/doc/usenglish/isehelp/pp_p_process_update_all_schematic_files.htm ( 1 ) /doc/usenglish/isehelp/pp_p_process_update_bitstream_processor_data_xps.htm ( 1 )
/doc/usenglish/isehelp/spartan3/libs_le_fdcpe.htm ( 1 ) /doc/usenglish/isehelp/spartan3/libs_le_fdrs.htm ( 1 )
/doc/usenglish/isehelp/spartan3/libs_le_fjksre.htm ( 1 ) /doc/usenglish/isehelp/sse_c_overview.htm ( 2 )
/doc/usenglish/isehelp/sse_p_adding_attr.htm ( 1 ) /doc/usenglish/isehelp/sse_p_adding_pin.htm ( 1 )
/doc/usenglish/isehelp/sse_p_creating_symbol.htm ( 1 ) /doc/usenglish/isehelp/sse_p_setting_pin_attrs.htm ( 1 )
/doc/usenglish/isehelp/sse_p_updating_instances.htm ( 1 ) /doc/usenglish/isehelp/sse_r_attr_pin.htm ( 1 )
 
Project Statistics
PROP_Synthesis_Tool=XST (VHDL/Verilog) PROP_Simulator=Modelsim-SE Mixed
PROP_Top_Level_Module_Type=Schematic PROP_PreferredLanguage=VHDL
PROP_Enable_Message_Filtering=false PROP_Enable_Incremental_Messaging=false
PROP_UseSmartGuide=false Partitions count=1
FILE_COREGEN=2 FILE_SCHEMATIC=5
FILE_UCF=1 FILE_VHDL=2
PROP_AutoTop=false PROP_CompxlibLang=VHDL
PROP_CompxlibOverwriteLib=true PROP_DevDevice=xc3s400
PROP_DevFamily=Spartan3 PROP_DevSpeed=-4
PROP_FitterReportFormat=HTML PROP_MapEffortLevel=Standard
PROP_PostTrceFastPath=false PROP_PreTrceFastPath=false
PROP_PreferredLanguage=VHDL PROP_SimModelInsertBuffersPulseSwallow=false
PROP_Top_Level_Module_Type=Schematic PROP_UserConstraintEditorPreference=Constraints Editor
PROP_XPowerOptLoadXMLFile=changed PROP_XPowerOptOutputFile=changed
PROP_intWorkingDirLocWRTProjDir=Same PROP_intWorkingDirUsed=No
PROP_xilxPAReffortLevel=Standard Project duration(days)=