MCP_TARGETv04 Project Status (08/05/2010 - 14:40:24)
Project File: MCP_TARGETv04.ise Implementation State: Programming File Generated
Module Name: TOP
  • Errors:
No Errors
Target Device: xc3s400-4pq208
  • Warnings:
288 Warnings
Product Version:ISE 11.5
  • Routing Results:
All Signals Completely Routed
Design Goal: Balanced
  • Timing Constraints:
All Constraints Met
Design Strategy: Xilinx Default (unlocked)
  • Final Timing Score:
0 (Setup: 0, Hold: 0, Component Switching Limit: 0) (Timing Report)
 
MCP_TARGETv04 Partition Summary [-]
No partition information was found.
 
Device Utilization Summary [-]
Logic UtilizationUsedAvailableUtilizationNote(s)
Number of Slice Flip Flops 1,395 7,168 19%  
Number of 4 input LUTs 1,292 7,168 18%  
Number of occupied Slices 1,331 3,584 37%  
    Number of Slices containing only related logic 1,331 1,331 100%  
    Number of Slices containing unrelated logic 0 1,331 0%  
Total Number of 4 input LUTs 2,306 7,168 32%  
    Number used as logic 1,292      
    Number used as a route-thru 1,014      
Number of bonded IOBs 114 141 80%  
    IOB Master Pads 5      
    IOB Slave Pads 5      
Number of RAMB16s 8 16 50%  
Number of BUFGMUXs 7 8 87%  
Number of RPM macros 3      
Average Fanout of Non-Clock Nets 2.94      
 
Performance Summary [-]
Final Timing Score: 0 (Setup: 0, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: All Constraints Met    
 
Clock Report [-]
Clock Net Resource LockedFanoutNet Skew(ns)Max Delay(ns)
xCLK_15MHzBUFGMUX3No600.0201.034
xCLKBUFGMUX1No1170.0201.034
xCLK_MAIN/XLXI_1572/
CLK_1HzBUFGMUX6No330.0191.033
XLXI_2978/XLXN_85BUFGMUX5No670.0191.033
xCLK_125MHzBUFGMUX7No4480.0211.035
xFCLKBUFGMUX4No10.0001.033
xTARGET_TOP/xTARGET_
RAM_TIMING/W_STRBBUFGMUX0No140.0201.034
xCLK_MAIN/XLXI_1572/
CLK_100HzLocal20.0002.234
XLXI_2840/xDAC_TIMIN
G/CNT<0>Local130.0542.049
xTARGET_TOP/xTARGET_
RAMP/RAMP_DONELocal60.0050.967
XLXI_2520/SLWRLocal80.2433.225
xTARGET_TOP/xTARGET_
RAM_TIMING/CNT_A<11>
Local100.0001.479
xTARGET_TOP/TRIGLocal40.0001.394
xCLK_MAIN/XLXN_183Local90.3012.832
XLXI_2978/XLXN_93Local100.0972.844
xTARGET_TOP/xTARGET_
TRIG/XLXN_403Local10.0001.455
XLXI_20/XLXN_26Local100.0193.276
xTARGET_TOP/xTARGET_
RAM_TIMING/CNT_A<3>Local580.0003.231
xCLK_MAIN/XLXN_169Local20.0001.803
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentThu Aug 5 14:38:59 20100268 Warnings42 Infos
Translation ReportCurrentThu Aug 5 14:39:16 2010000
Map ReportCurrentThu Aug 5 14:39:34 201006 Warnings2 Infos
Place and Route ReportCurrentThu Aug 5 14:40:05 2010013 Warnings1 Info
Post-PAR Static Timing ReportCurrentThu Aug 5 14:40:10 2010002 Infos
Bitgen ReportCurrentThu Aug 5 14:40:22 201001 Warning1 Info
 
Secondary Reports [-]
Report NameStatusGenerated

Date Generated: 08/05/2010 - 14:40:24