Present
Notes
Summary of actions
There was then some discussion of the previous day's announcement by CES of a Power-PC-based PMC to be produced later in 1997. Although this board looks very analogous to the ROB-IN, it was agreed that it should not interfere with the current ROB-IN plans, since it would probably be ready too late for useful customisation on the required time-scale. RM should, however, continue to monitor this development on behalf of the project team.
RC reported that it had been agreed that the processor choice has essentially been made. Mainly for reasons of ease of design and conservation of board space the preferred processor is the Intel i960RP, which incorporates bridging between the i960 bus and two independent PCI busses. This processor has a quoted performance of ~30 MIPS, which should be adequate if the buffer manager is programmed at assembler level. Since this performance cannot be checked until an evaluation kit is to hand, and we do not want to start designing with a new processor at this stage, it was agreed that the board should be made with this processor irrespective of the results of any performance measurements; if the board does not achieve the full target performance, we might be able to upgrade the processor, or we might consider a further design with a more performant chip. DF noted that it might be useful to have a version of the buffer manager programmed in C, even if an Assembler version proved necessary for full performance.
RC reported that an order had just been placed for an i960RP evaluation kit (~2,000 pounds) as well as a PCI-based PC for use as a development platform. He had been promised information, also, on in-circuit emulators for use with the i960RP chip. Such an emulator should make it easier to construct an emulated environment for independent development of the buffer manager software, but it is likely that it will prove too expensive. RM noted that in CERN they had in general found ICE's not to be very useful.
RM showed drawings of the new proposal for a VME spec, based on 9U boards with space BEHIND them for small boards to be plugged in to the other side of the backplane. There was strong pressure to increase this space so that it could accommodate e.g. PMC boards.
There then followed discussion of options for some of the main components. It was noted that CES are offering up to 8 MB of DRAM on their newly-announced PMC (see above). RM thought that this was likely to be in the form of very thin chips mounted on the non-component side of the board and there was some consideration of the possibility of doing the same for the ROB-IN. However the ROB-IN memory has to be particularly fast (~15ns? with setup and access in the same cycle), so this is probably not an option (needs confirmation with Barry).
FIFOs and FPGAs were also discussed. RC reported a conversation with Barry and Gordon in which it had been concluded that an FPGA-based FIFO could probably not be made deep enough (i.e. ~20 addresses). This means that either two or three FIFO chips are required (for the FREE and USED FIFOs); it was felt that strong attempts should be made to keep this number to two. In the course of discussion of the possibilities for an input FIFO (Barry is currently considering no actual FIFO on the input), RM declared that "XOFF should be regarded as an integral part of the DAQ".
OB noted that CERN were mainly using Altera FPGAs (up to 5,000 logic blocks) rather than the MACH5 chip chosen by Barry. JAS, however, pointed out that the choice largely depends on local experience and infrastructure.
RC asked for confirmation that the full PMC spec should continue to be followed. Everyone thought it was very important to follow the spec.
It was generally felt that a rough mechanical layout should be prepared a.s.a.p. so that ALL components could be ordered in case there were any delivery delays (the evaluation kit had originally been quoted at 4 months! though the latest quote was for 7-10 days). A rough layout would also serve as a basis for discussion of component options, it being proposed that Barry (and Gordon if possible) meet with RM and OB when Barry comes to CERN for the DS-demo setup (10-Feb?).