PCI communications
The i960RP has a comprehensive Messaging Unit (MU) to provide
communictaion between the host processor and the i960 core
processor. However, it is still proposed in the first instance to
use a simple software fifo (circular buffer) as described in the
note PCI message passing in the
RoB-in context.
i960RP Messaging Unit
The i960RP MU has the following facilities.
Message Registers
These can be used to pass single words only as each word
written generates an interrupt whose flag must be cleared before
another can be written. This makes them unsuitable for use
as the head and tail pointer registers described in the earlier
note.
Doorbell Registers
These can be used to generate an interupt on the i960. This may be
usefull for sending a reset command but otherwise it is not intended
that the i960 software use interrupts.
Circular queues
These appear from the i960's perspective to be very much like
the software fifos proposed earlier but to the host processor they
look like real hardware fifo's, words are all written to or read
from the same address.
The problems with using the circular queues for passing the actual
messages are:
- The host processor can only read or write one word at a
time as the port address is always the same.
- The host processor cannot see the head and tail pointers so
it is unable to determine how much space remains.
The circular queues are much more suited to passing identifiers
(addresses or indices) of message buffers with the message bodies
being stored elsewhere.
GJC
(gjc@hep.ucl.ac.uk)