ROB-IN Compatibility with User Requirements

(from rob-in design review, 15-Sep-1997)


UR DI-RATE
Fragment Arrival Rate
Estimate for 33MHz i960RP ~= 75kHz, i960RD runs at 66MHz.
UR DI-EFS
Event Fragment Size
Page size programmable via PLD -- event size depends on page size.
UR DI-IDR
Input Data Rate
Bandwidth of buffer memory = 4 * 33 MB/s; link clock can be faster (depends on input fifo), but average bandwidth =< 132. Start/end control word on S-LINK -- recognised by hardware.
UR DI-FC
Flow Control
XOFF on data input controlled by control bit which operates automatically at pre-programmed level on the free-page fifo, or toggled by software.
* Input fifo could still overflow --> add in XOFF control by input-fifo half-full (use 2nd control bit).
* Pin for L1-inhibit still desirable on prototype - from separately programmed free-page fifo level.
UR DI-EXP
Data Expansion
Final system.
UR DI-ALLO
Buffer Space Allocation
ok
UR L2-BS
Buffer Size
1 MB planned -- ok for prototype
UR L2-ROI
RoI_request Handling
ok
UR L2-REJ
L2_reject Handling
ok. Buffer manager accepts message with list of up to 100 decisions.
UR L2-ACC
L2_accept Handling
ok
UR L3-OUT
L3 Data Output
L3-request rather than L2_accept triggers data transfer. Incomplete URD table irrelevant? Ratio of input rate to output rate for original T2B was 3:1, but in the current design is not yet tied down -- wait to see what is needed in practice.
UR L3-WAIT
Wait for L3_done
ok
UR CTL-SC
State Changes
Run control yet to be defined.
UR CTL-CONF
Configuration
Reprogrammable ROM on board.
UR ERR-TRANS
Transmission Error
S-LINK has an error line that can be pulled down, but errors can also be flagged in last two data bits. Error information is only really needed on an event-by-event basis, thus error line serves no purpose beyond what is in the control words.
Error line is available in rob-in status register and control words get written into memory. Status bits get or'd over all words in an event and written into the used page fifo; since the used page fifo has to be read anyway this is an efficient place to put link error info (e.g. start without end, end without start, etc.).
Start of event is written both at end of previous event and beginning of new event. Data with no start is ignored (since it had been agreed earlier that the rob-in should start cleanly and not in the middle of an event).
Should a dummy fragment be generated or allowed to go into memory? What if the control word is illegal? Start and end are actually human-readable nibbles ("BOB" and "EOB"), but they differ in only a couple of bits. Bit 30 is sufficient to distinguish between them.
UR ERR-FBIG
Fragment Too Big Error
An event is limited to a maximum of the number of pages allowed per event in the index table. After that pages get thrown away.
UR ERR-FERR
Fragment Contains Error
Final system.
UR ERR-MON
Error Monitoring
Negotiable, ambiguous -- don't worry at this stage.
UR ERR-DATA
Dataflow Errors
Unknown TTC_ID: historical -- no longer any TTC input!
Orphan fragment: historical -- no longer any TTC input!
Unknown RoI_request: ok
Unknown L2_accept: ok. Triggered by L3_request, rather than L2_accept.
Unknown L2_reject: ok
Forgotten fragment: Current implementation has a "stale fragment" list -- best that can be done?
L3_done not received: Current software assumes an L3_done will be received and handles it like an L2_reject. Else it becomes a stale fragment.
UR ERR-REC
ROB-IN Recovery
Final system.
UR GBL-MON
Monitor Data Handling
To be defined (by DAQ -1?).
UR GBL-HIST
History Maintenance
A "sliding window" history of messages is implicitly provided by the circular message buffer.
UR GBL-PERF
Performance Recording
Final system.
UR GBL-ACC
External Access
ok
UR GBL-AUTO
Auto-Test Mode
No room for self-contained data injection into the input fifo.
S-LINK test mode should be ok -- seen as a series of "start" control words. Therefore SLIDAS can be used, with test mode initiated by control word written by the rob-in.
UR CON-SIZE
Size Constraint
This is assumed in the design spec. It should be possible to accomplish when test points and JTAG connections are removed from debug PCI version!
UR CON-POW
Power Constraint
This is an area for concern, particularly in view of the power required by S-LINK (SCSI destination requires 3-4 Watts, Fibre Channel even more. PMC spec allows 7.5 W total, though RIO2 documentation refers to only 4 W.
* May need to arrange special cooling and/or remote S-LINK module (via, for example, the RHUL S-LINK to cable adapter board).
UR CON-COST
Cost Constraint
Final system, but does not seem unreasonable.
UR CON-RC
Run Control Interface
Final system.
UR CON-MON
Monitor System Interface
Final system.
UR CON-EB
ROB-OUT Interface
ok
UR CON-L2
Level-2 Interface
ok