"$Id: pld4b.src,v 1.18 2001/12/19 19:40:00 warren Exp $
"==============================================================================
#TITLE	 'ATLAS SCT	TIM, PLD4b:	BCID & TTID	Registers';
#ENGINEER 'Martin	Postranecky	/ Dominic A	Hayes';
#COMPANY	 'University College	London';
#COMMENT	 '';

"==============================================================================
"CVS Update Log
"==============================================================================

"$Log: pld4b.src,v $
"Revision 1.18  2001/12/19 19:40:00  warren
"Tidied
"
"Revision 1.17  2001/12/18 13:52:15  warren
"Figed timing on IDs - now use clk4
"
"Revision 1.16  2001/11/14 20:11:50  warren
"Improved timing and BCID counter rollover change
"
"Revision 1.15  2001/09/14 15:55:35  warren
"Improved timing of strobes
"
"Revision 1.14  2001/09/10 17:51:39  warren
"clocking now o idTRIG, BCID
"
"Revision 1.13  2001/08/30 12:20:42  warren
"Tidied, Capitalization
"
"Revision 1.12  2001/08/08 18:40:45  warren
"signal name upper/lower case standardization
"
"Revision 1.11  2001/08/03 09:14:05  warren
"fixed timing problems with delayedBCID and counter
"
"Revision 1.10  2001/07/23 11:18:38  warren
"renamed signals with proper polarity n prefixes and removed LOW_TRUEs
"
"Revision 1.9  2001/07/19 10:44:51  warren
"removed unused spare bus lines
"added SA mode strobes
"
"Revision 1.8  2001/06/22 13:07:48  warren
"Work on sim and func - may work!  -- questions on strobes none the less
"
"Revision 1.7  2001/06/15 17:01:42  warren
"Cleaned up code organisation
"	"Revision 1.6	2001/04/03 15:44:22	warren
"OA_rst	stuff	"




"==============================================================================
"Mods Log
"==============================================================================

"14jan00	nLEb2 -> /nLEb2.
"22Mar00	regC,	regD -->	reg14, reg16.
"			added	4 extra bits to RegisterTTID.	 BCID_offset as o/ps.
"16may00	removed bcid_offset register and	o/ps.
"18may00	name:	run -> runmode.
"			name:	TTypein -> TTIDin
"			BCntin[12] i/p	inplace of BCID[12] decoding now	done by pld4a/b.
"				*** NB *** clocking and	enabling	not complete yet.
"26may00	o/ps BC/TT_Strobe	added.
"30May00	new i/p StrobeRst; where from	I don't know.
"			counter clocking now	IF-THEN structure.
"05jun00	Added	  INPUT	  idbcr,	enbcid, enttype, ensabcr2;	 "???	not used	yet
"					  OUTPUT	  sabcr2;
"08jun00	name:	clkC -> clk4.
"29jun00	StrobeResets FF NODEs added.
"30jun00	RegisterOffsetBCID[11..0] and	OffsetBCID[11..0]	deleted.
"			bcid_offset	a register again (Reg14	[15..12]).
"			BCIDcounter	no	longer pre-loaded.
"			delayed_idBCR reinstated (from delayAB2)
"05jul00	Register2ATTC_BCID fed	by	BCntin.
"11sep00	Regxx, nLEb2, breadb,	bwriteb now	HIGH_TRUE.
"27sep00	Default_to added to Register 2A.
"01Nov00	bcid_offset	is	now writable in both	run/vme modes - JBL
"21Mar01	Removed LOW_TRUE from noa_rst, added oa_rst = /noa_rst & repl in code
"14Jun01	Re-organised layout and bwriteb logic
"			Register2A renamed to RegisterTTC_BCID
"20Jun01 Reworked BCIDcounter to ensure free running in both modes (VME/RUN)
"21Jun01 Removed most DEFAULT_TO's
"14Aug01 Renamed counterC to BCIDcounter
"10Sep01 Added clocking to idTRIG (=qidTRIG) and BCID output.
"13Sep01 BCID now clocked by /clk4
"23Oct01 Added clocking to TTC Strobes (BCntStrove, TTypeStrobe), removed
"			 redundant code
"        Improved TTID_reg clocking by removing undefined states
"			Added clocking to TT_Strobe and BC_Strobe OUTPUTS
"09Nov01 Changed BCID counter wrap-around to FFFh

"==============================================================================
"CODE
"==============================================================================

			INPUT		noa_rst;				"Low_True Board reset.
VIRTUAL	NODE		OA_rst;
						OA_rst =	/nOA_rst;


INPUT		clk4;

INPUT		runmode;							"Run mode =	1,	vme mode	= 0;

INPUT		bwriteb;							"Buffered VME write.
INPUT		breadb;							"Buffered VME read.
INPUT		Reg14, Reg16, Reg2A;			"Register enables.
INPUT		nLEb2;								"VME register clock.

BIPUT		db[15..0]											"VME databus.
				ENABLED_BY dboe;
NODE		dboe;

NODE		MaxCount
            DEFAULT_TO 0;

"------------------------------------------------------------------------------
"BCR
"---


INPUT		ENsaBCR2;  "*** not used yet?
         
INPUT		idBCR;

NODE		bcid_offset[3..0]
				CLOCKED_BY nLEb2
				CLOCK_ENABLED_BY (Reg14 AND bwriteb)
				RESET_BY	OA_rst;
			bcid_offset[3..0] = db[15..12];

NODE		shiftidBCR[15..0]
				CLOCKED_BY clk4			
				RESET_BY	OA_rst;

NODE		delayed_idBCR						  "delayed idBCR
				CLOCKED_BY	clk4
				RESET_BY	OA_rst;

OUTPUT	saBCR2;
			saBCR2 = MaxCount	AND ENsaBCR2;

         " delay shift register
         "----------------------
			shiftidBCR = [shiftidBCR[14..0],	idBCR];

			CASE (bcid_offset)
				WHEN 0  => delayed_idBCR =	shiftidBCR[ 0];
				WHEN 1  => delayed_idBCR =	shiftidBCR[ 1];
				WHEN 2  => delayed_idBCR =	shiftidBCR[ 2];
				WHEN 3  => delayed_idBCR =	shiftidBCR[ 3];
				WHEN 4  => delayed_idBCR =	shiftidBCR[ 4];
				WHEN 5  => delayed_idBCR =	shiftidBCR[ 5];
				WHEN 6  => delayed_idBCR =	shiftidBCR[ 6];
				WHEN 7  => delayed_idBCR =	shiftidBCR[ 7];
				WHEN 8  => delayed_idBCR =	shiftidBCR[ 8];
				WHEN 9  => delayed_idBCR =	shiftidBCR[ 9];
				WHEN 10 => delayed_idBCR =	shiftidBCR[10];
				WHEN 11 => delayed_idBCR =	shiftidBCR[11];
				WHEN 12 => delayed_idBCR =	shiftidBCR[12];
				WHEN 13 => delayed_idBCR =	shiftidBCR[13];
				WHEN 14 => delayed_idBCR =	shiftidBCR[14];
				WHEN 15 => delayed_idBCR =	shiftidBCR[15];
			END CASE;



"------------------------------------------------------------------------------
"COUNTER
"-------




NODE		BCIDcounter[11..0]				"Reg14
				CLOCKED_BY clk4
				RESET_BY	OA_rst;
				

   		"BCIDcounter assignment	and Async reset
			"-----------------------------------
			IF	(delayed_idBCR) THEN
				BCIDcounter	= 0;

			"ELSIF	(BCIDcounter =	3563)	THEN	"### SET MaxCount here ###
			ELSIF	(BCIDcounter =	0FFFh)	THEN
				BCIDcounter	= 0;
				MaxCount	= 1;

			ELSE
				BCIDcounter	= BCIDcounter .+.	1;
			END IF;




"------------------------------------------------------------------------------
"TTC_BCID -- Reg2A
"-----------------

INPUT		BCntIn[11..0];

INPUT		BCntStrobe; 


NODE		qBCntStrobe
				CLOCKED_BY clk4
				RESET_BY	OA_rst;

			qBCntStrobe	= BCntStrobe;			"clocked	BCntStrobe
			

NODE		RegisterTTC_BCID[11..0] "Reg2A
				CLOCKED_BY qBCntStrobe
				RESET_BY	OA_rst;
				
			RegisterTTC_BCID[11..0] = BCntIn[11..0];
			
INPUT		idTRIG;


NODE 		qidTRIG
				CLOCKED_BY clk4
				RESET_BY	OA_rst;
			qidTRIG = idTRIG;
			
INPUT		enBCID;

OUTPUT	BC_Strobe
				CLOCKED_BY clk4
				RESET_BY OA_rst;
				

			IF (runmode) THEN
				BC_Strobe =  qBCntStrobe AND enBCID;	"clocked	BCntStrobe
				
			ELSE
				BC_Strobe = qidTRIG AND enBCID;
				
 			END IF;
			

"------------------------------------------------------------------------------
"BCID -- Reg14
"-------------


NODE		RegisterBCID[11..0]		"Reg14	COUNTER/MASTER W, VME R
				CLOCKED_BY 	regBCIDclk
				RESET_BY		OA_rst;

			RegisterBCID = BCIDcounter;
			
	
OUTPUT	BCID[11..0]
				CLOCKED_BY 	clk4
				RESET_BY		OA_rst;
			BCID[11..0] = RegisterBCID[11..0];


			
NODE		regBCIDclk;

			IF	(runmode) THEN
				regBCIDclk	 = BCntStrobe;

			ELSE
				regBCIDclk	 =	qidTRIG;	

			END IF;




"------------------------------------------------------------------------------
"TTID -- Reg16
"-------------

INPUT		TTIDin[9..0];

INPUT		TTypeStrobe;

NODE		qTTypeStrobe
				CLOCKED_BY clk4
				RESET_BY	OA_rst;

			qTTypeStrobe = TTypeStrobe;					"clocked	TTypeStrobe

NODE		RegisterTTID[9..0]		"Reg16	MASTER/VME	R/W
				CLOCKED_BY 	regTTIDclk
				RESET_BY		OA_rst;
NODE		regTTIDclk;

OUTPUT	TTID[9..0];
			TTID[9..0] = RegisterTTID[9..0];


			IF	(runmode) THEN                " --- Run Mode ---
				regTTIDclk = qTTypeStrobe;
				RegisterTTID[9..0] = TTIDin[9..0];

			ELSIF	(bwriteb AND Reg16) THEN   " --- VME Mode ---
				regTTIDclk	 =	nLEb2;
				RegisterTTID =	db[9..0];
				
			ELSE
				regTTIDclk = 0;
				RegisterTTID = RegisterTTID;
				
			END IF;


INPUT    enTType;			
OUTPUT	TT_Strobe
				CLOCKED_BY clk4
				RESET_BY OA_rst;

			IF (runmode) THEN
				TT_Strobe = qTTypeStrobe AND enTType;	"clocked	BCntStrobe

			ELSE
				TT_Strobe = qidTRIG AND enTType;

 			END IF;






"------------------------------------------------------------------------------
"VME I/O
"-------


			IF	(breadb)	THEN
			
				IF	(Reg14) THEN
					db[15..12] = bcid_offset;
					db[11..0]  = RegisterBCID;
					
				ELSIF	(Reg16) THEN
					db[9..0]	  = RegisterTTID;
					
				ELSIF	(Reg2A) THEN
					db[11..0]  = RegisterTTC_BCID;		"BCntin
					
				END IF;
				
			END IF;

			dboe = breadb AND (Reg14 OR Reg16 OR Reg2A);


"------------------------------------------------------------------------------
" SPARE I/O
"----------

			INPUT	sgbA[7..0];			"Spare global	bus A
			INPUT	sgbB[7..0];			"Spare global	bus B
			INPUT	sgbC[7..0];			"Spare global	bus C
			INPUT	sgbD[5..0];			"Spare global	bus D

			INPUT	s4b_5[7..0];		"Spare loCAL bus no pld3 so connect bus from
											"pld2 to 4a instead.
			INPUT	s4a_4b[7..0];		"Spare loCAL bus

"==============================================================================
