/* ---------------------------------------------------------------------------
 * Header file of constants generated by tim_register_list.xls
 * for timlet and timrun.
 * 09/11/2005 15:57:37
 * Author : tim_register_list.xls (Matt Warren)      generated_tim_constants.h
 * ---------------------------------------------------------------------------
 */
 
#ifndef GENERATED_TIM_CONSTANTS_H
#define GENERATED_TIM_CONSTANTS_H

#define TIM2_REG_WORDS 26
#define MAX_REG_WORDS 80

#define TIM3_REG_WORDS (MAX_REG_WORDS-2) /* Ensures 2 debug registers removed from test */

static unsigned short reg_rst_vals[MAX_REG_WORDS] = {
  /*** matt: modded reg_status for pulled up bit (laser interlock)*/
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x8A80, 0x4040, 
0xFFFF, 0x00FF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0640, 0x0004, 0x0400, 
0x0000, 0x00B0, 0x0000, 0x1000, 0x0000, 0x8400, 0x0000, 0x0300, 
0x0000, 0x0000, 0x0000, 0x0000, 0x9C40, 0x000A, 0x0050, 0x0A6A, 
0x0C04, 0x0028, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x4000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000
};
 
static unsigned short reg_rd_masks[MAX_REG_WORDS] = {
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xD9FE, 
0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0xFFFF, 0x0000, 0xFFFF, 0x0000, 0x3FFF, 0xFFFF, 0xFFFF, 
0x0000, 0xFFFF, 0x0000, 0xFFFF, 0x0000, 0xFFFF, 0x0000, 0xFFFF, 
0x0000, 0x0000, 0x0000, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0x0000, 0xFFFF, 0xFFFF, 
0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0xFFFF, 
0xFFFF, 0xFFFF, 0x0000, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF
} ;

static unsigned short reg_wr_masks[MAX_REG_WORDS] = {
/* need to turn off all sources of ECR & L1A for L1ID ... *** *
   {0xFFFF, 0x6FFF, ...
   ...                             0xFFFF, 0xFFFF, ...          */
/*** reg 2c: changed to tim3 version - tim2 needs changing */
0xFF00, 0x6F00, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 0x0000, 0x0000, 
0xFFFF, 0x00FF, 0xF000, 0x03FF, 0x7FE0, 0xFFF0, 0xFFFF, 0xFFFF, 
0x0000, 0x0000, 0x0000, 0x0000, 0x000F, 0x0000, 0x3FFF, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x7FFF, 0x0000, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0xFFFF, 0x0000, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0xFFFF, 0xFFFF, 0xFFFF, 0xFFFF, 
0xFFFF, 0xFFFF, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xFFFF, 
0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xFFFF, 0x0000
};
 

/* Register Bits*/

enum reg_bit {

/* enables */

bEnIntTRIG       = 0x0002,
bEnIntECR        = 0x0004,
bEnIntBCR        = 0x0008,
bEnRandom        = 0x0010,
bEnIntFER        = 0x0020,
bEnWindow        = 0x0040,
bEnIntBusy       = 0x0080,
bEnExtClk        = 0x0100,
bEnExtTRIG       = 0x0200,
bEnExtECR        = 0x0400,
bEnExtBCR        = 0x0800,
bEnExtCAL        = 0x1000,
bEnExtFER        = 0x2000,
bEnExtSEQ        = 0x4000,
bEnExtBusy       = 0x8000,

/* command */

bvTRIG           = 0x0002,
bvECR            = 0x0004,
bvBCR            = 0x0008,
bvCAL            = 0x0010,
bvFER            = 0x0020,
bvSpare          = 0x0040,
bvBusy           = 0x0080,
bvRodBusy        = 0x0100,
bvBurstMode      = 0x0200,
bvBurstGo        = 0x0400,

bEnRunMode       = 0x1000,
bEnTestBusy      = 0x2000,
bClrTestBusy     = 0x4000,
bvReset          = 0x8000,

/* burst */

/* frequency */

/* window */

/* delays */

/* status */
bExtBusy         = 0x0001,
bMExtBusyout     = 0x0002,
bBusy            = 0x0004,
bBusyout         = 0x0008,
bBurstActive     = 0x0010,
bSeqSrcAct       = 0x0020,
bSeqSinkAct      = 0x0040,
bRodBusyout      = 0x0080,
bTTCClkOK        = 0x0100,
bSAClkOK         = 0x0200,
bRunMode         = 0x0400,
bSaMode          = 0x0800,

bTIMOK           = 0x2000,
bTestBusy        = 0x4000,
bLaserInterlock  = 0x8000,

/* fifo */

bIDEF            = 0x0040,
bIDFF            = 0x0080,

bTTEF            = 0x4000,
bTTFF            = 0x8000,

/* l1idl */

/* l1idh */

/* bcid */

/* ttid */

/* run_enable */
bEnTTCClk        = 0x0001,
bEnL1A           = 0x0002,
bEnECR           = 0x0004,
bEnBCR           = 0x0008,
bEnCAL           = 0x0010,
bEnFER           = 0x0020,
bEnSpare         = 0x0040,
bEnRodBusy       = 0x0080,
bEnExtRodBusy    = 0x0100,
bEnID            = 0x0200,
bEnTYPE          = 0x0400,

bEnSaECR         = 0x4000,
bEnSaBCR         = 0x8000,

/* seq_ctl */
bEnSeqTRIG       = 0x0001,
bEnSeqECR        = 0x0002,
bEnSeqBCR        = 0x0004,
bEnSeqCAL        = 0x0008,
bEnSeqID         = 0x0010,
bEnSeqTT         = 0x0020,
bEnSeqFER        = 0x0040,
bEnSeqSpare      = 0x0080,

bSeqReset        = 0x0200,
bSeqGo           = 0x0400,
bEnCyclic        = 0x0800,

bSinkReset       = 0x2000,
bSinkGo          = 0x4000,
bEnStartSink     = 0x8000,

/* seq_end */

/* rb_mask */

/* rb_stat */

/* rb_latch */

/* rb_mon */

/* ttc_data */

/* ttc_select */

/* ttc_bcid */

/* ttcrx_ctl */

bRead            = 0x2000,
bEnable          = 0x4000,
bControl         = 0x8000,

/* ttc_status */
bBCntRes         = 0x0001,
bEvCntRes        = 0x0002,

bL1Accept        = 0x0100,
bBrcstStr1       = 0x0200,
bBrcstStr2       = 0x0400,
bDoutStr         = 0x0800,
bDbErrStr        = 0x1000,
bSinErrStr       = 0x2000,
bTTCReady        = 0x4000,

/* tim_output */
bTTCout0         = 0x0001,
bTTCout1         = 0x0002,
bTTCout2         = 0x0004,
bTTCout3         = 0x0008,
bTTCout4         = 0x0010,
bTTCout5         = 0x0020,
bTTCout6         = 0x0040,
bTTCout7         = 0x0080,

/* tim_id */

/*  */

/*  */

/*  */

/*  */

/*  */

/*  */

/*  */

/* enables3 */

bL1IDroECRen     = 0x0010,
bQpllControlEn   = 0x0020,
bRandom2En = 0x0040,

bTrigSeqModeEn   = 0x0100,
bShortFPSigsEn   = 0x0200,
bPreBusyBurstEn  = 0x0400,

/*  */

/* control */

/*  */

/* status3 */
bTTCReady3       = 0x0001,
bQpllPresent     = 0x0002,
bQpllError       = 0x0004,
bQpllLocked      = 0x0008,
bTtcClkOK3       = 0x0010,

bSaClkOK3        = 0x0040,
bTtcClkEnOK      = 0x0080,
bExtClkEnOK      = 0x0100,
bIntClkEnOK      = 0x0200,
bPllStable       = 0x0400,

bspare_in        = 0x4000,
bspare_link      = 0x8000,

/* status_lch */

/* stat3_lch */

/*  */

/* qpll_ctl */

bQpllAutorestart = 0x0010,
bnQpllReset      = 0x0020,
bQpllExtControl  = 0x0040,
bQpllMode        = 0x0080,

/*  */

/* busy_en3 */
benRBbusy        = 0x0001,
benXRBbusy       = 0x0002,
benVRBbusy       = 0x0004,
benXBbusy        = 0x0008,
benVBbusy        = 0x0010,

benRBbusyout     = 0x0100,
benXRBbusyout    = 0x0200,
benVRBbusyout    = 0x0400,
benXBbusyout     = 0x0800,
benVBbusyout     = 0x1000,
benBSTBbusyout   = 0x2000,
benTSTBbusyout   = 0x4000,
benDTBbusyout    = 0x8000,

/*  */

/* busy_stat3 */
bRodBusy         = 0x0001,
bExtRodBusy      = 0x0002,
bvRodBusy3       = 0x0004,
bExtBusy3        = 0x0008,
bvBusy3          = 0x0010,
bBurstBusy3      = 0x0020,
bTestBusy3       = 0x0040,
bDeadTimeBusy    = 0x0080,
bClkSwitchBusy   = 0x0100,
bBusy3           = 0x0200,
bRodBusyout3     = 0x0400,
bBusyout3        = 0x0800,
bMExtBusyout3    = 0x1000,

bFFVetoOn        = 0x4000,
bFFTVLinkStat    = 0x8000,

/*  */

/* bstat3_lch */

/* bcountl */

/* bcounth */

/* bcountx */

/* fv_vetolen */

/* fv_match */

/* fv_p_min */

/* fv_p_max */

/* fv_oflow */

/* fv_deltat */

/* fv_countl */

/* fv_counth */

/* fv_countx */

/*  */

/* fv_tcountl */

/* fv_tcounth */

/* tp_fifol */

/* tp_fifoh */

/* fv_idl */

/* fv_idh */

/*  */

/*  */

/*  */

/* burst_hi */

/* tt_count */

/* tts_count */

/* tstampl */

/* tstamph */

/* src_addr */

/* sink_addr */

/* debug_ctl */

bCSBdisable      = 0x0100,
bSARBdisable     = 0x0200,

bFVdisable       = 0x1000,
bXrandomEn = 0x2000,

/* debug_stat */

 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 
 

};
         

enum reg_id {

ENABLES    =  0,  /* 0x00*/
COMMAND    =  1,  /* 0x02*/
BURST      =  2,  /* 0x04*/
FREQUENCY  =  3,  /* 0x06*/
WINDOW     =  4,  /* 0x08*/
DELAYS     =  5,  /* 0x0A*/
STATUS     =  6,  /* 0x0C*/
FIFO       =  7,  /* 0x0E*/
L1IDL      =  8,  /* 0x10*/
L1IDH      =  9,  /* 0x12*/
BCID       = 10,  /* 0x14*/
TTID       = 11,  /* 0x16*/
RUN_ENABLE = 12,  /* 0x18*/
SEQ_CTL    = 13,  /* 0x1A*/
SEQ_END    = 14,  /* 0x1C*/
RB_MASK    = 15,  /* 0x1E*/
RB_STAT    = 16,  /* 0x20*/
RB_LATCH   = 17,  /* 0x22*/
RB_MON     = 18,  /* 0x24*/
TTC_DATA   = 19,  /* 0x26*/
TTC_SELECT = 20,  /* 0x28*/
TTC_BCID   = 21,  /* 0x2A*/
TTCRX_CTL  = 22,  /* 0x2C*/
TTC_STATUS = 23,  /* 0x2E*/
TIM_OUTPUT = 24,  /* 0x30*/
TIM_ID     = 25,  /* 0x32*/

ENABLES3   = 33,  /* 0x42*/

CONTROL    = 35,  /* 0x46*/

STATUS3    = 37,  /* 0x4A*/
STATUS_LCH = 38,  /* 0x4C*/
STAT3_LCH  = 39,  /* 0x4E*/

QPLL_CTL   = 41,  /* 0x52*/

BUSY_EN3   = 43,  /* 0x56*/

BUSY_STAT3 = 45,  /* 0x5A*/

BSTAT3_LCH = 47,  /* 0x5E*/
BCOUNTL    = 48,  /* 0x60*/
BCOUNTH    = 49,  /* 0x62*/
BCOUNTX    = 50,  /* 0x64*/

FV_VETOLEN = 52,  /* 0x68*/
FV_MATCH   = 53,  /* 0x6A*/
FV_P_MIN   = 54,  /* 0x6C*/
FV_P_MAX   = 55,  /* 0x6E*/
FV_OFLOW   = 56,  /* 0x70*/
FV_DELTAT  = 57,  /* 0x72*/
FV_COUNTL  = 58,  /* 0x74*/
FV_COUNTH  = 59,  /* 0x76*/
FV_COUNTX  = 60,  /* 0x78*/

FV_TCOUNTL = 62,  /* 0x7C*/
FV_TCOUNTH = 63,  /* 0x7E*/
TP_FIFOL   = 64,  /* 0x80*/
TP_FIFOH   = 65,  /* 0x82*/
FV_IDL     = 66,  /* 0x84*/
FV_IDH     = 67,  /* 0x86*/

BURST_HI   = 71,  /* 0x8E*/
TT_COUNT   = 72,  /* 0x90*/
TTS_COUNT  = 73,  /* 0x92*/
TSTAMPL    = 74,  /* 0x94*/
TSTAMPH    = 75,  /* 0x96*/
SRC_ADDR   = 76,  /* 0x98*/
SINK_ADDR  = 77,  /* 0x9A*/
DEBUG_CTL  = 78,  /* 0x9C*/
DEBUG_STAT = 79,  /* 0x9E*/

ENABLES1   = 129,  /* 0x102*/

COMMAND1   = 131,  /* 0x106*/

STATUS1    = 133,  /* 0x10A*/
TIM_ID1    = 134,  /* 0x10C*/

TSTAMP1L   = 136,  /* 0x110*/
TSTAMP1H   = 137,  /* 0x112*/

DEBUG1CTL  = 142,  /* 0x11C*/
DEBUG1STAT = 143,  /* 0x11E*/

}; 
 
#endif