/* --------------------------------------------------------------------------- * Soak test program for TIM standalone * * Author : J.B.Lane UCL September 2000 timlet.c * --------------------------------------------------------------------------- */ /* ox9 PLD firmware is CVS v1.30 14Oct02 */ #include "ask.h" #include "vme.h" #include "timlet.h" #include #include /*** static int debug_level = 0 ; */ static int reset_level = 0 ; const static unsigned short RAM_mask[1] = {0xFFFF} ; /* NB some regs < 16 bits */ /* Not const as reg_rst_vals can change depending whether TTCrx * is present. In particular: 0c(stat) and 2e(ttc) * Maybe document that TTC functions take AGES to reset (50us?) * Changed 00 to 0000 (no EnIntClk), 0c --> 0b80 (rodbusy in SAmode) */ unsigned int buffer[TIM_RAM_SIZE] ; unsigned int buffer1[FPGA1_RAM_SIZE] ; void timlet (void) ; int test_bcid (const int) ; int test_brst (const int) ; int test_busy (const int) ; int test_clk (const int) ; int test_cmd (const int) ; int test_l1id (const int) ; int test_ram (const int) ; int test_reg (const int) ; int test_rst (const int) ; int test_seq (const int) ; int test_ser (const int) ; int test_veto (const int); /*** note: not used! */ int test_fftv (const int); int test_ram1 (const int) ; int test_burst (const int, const int, const int, const int) ; int test_cmdbit (const int, const int) ; int test_cmdsink (const int, const int) ; void test_seqalls (void) ; int test_seqbits (void) ; int test_seqcmd (const int) ; int test_seqcmds (void) ; void test_set (void) ; int main (void) { /***memory_ptr = ask_vme (0x10000) ;*/ (void) tim_vme (0x10000) ; ram_ptr = memory_ptr + TIM_RAM_SIZE ; /* offset is 16-bit words */ if (memory_ptr != NULL) timlet () ; else printf ("Error opening VME window\n") ; vme_end () ; return (0) ; } /* --------------------------------------------------------------------------- */ void timlet (void) { int error_count = 0 ; int errors = 0 ; int nloops, loop, i ; int qpll_locked = bQpllLocked; /* pulled up if no qpll connected */ int qpll_lock_lch = bQpllLocked; int prev_stat3 = 0; int random_seed; random_seed = time(0); printf("Random seed %d.\n", random_seed); srand(random_seed); timSetupPtr(); /* setup pointers to individual registers *** shouldn't need this later */ test_set(); /* get test loops and debug level, all loops */ profile_tim(); /* Check tim version, attached hardware etc, and make adjustments to defaults used here*/ /* timReset(Quiet); done inside profile.. but maybe here?? */ /* below should be in tim_profile definition, but it won't work there (cant modify the rst_val there */ /*** Setup TTC present related defaults */ /* Change masks for reg c:0A00->0B00, 2e: 0000->4000 * These are c:TTCClkOn bit, 2e:TTCready bit * * BCR from TTC */ reg_rst_vals[TTC_STATUS] |= reg[TTC_STATUS] & bTTCReady; reg_rst_vals[TTCRX_CTL] |= reg[TTCRX_CTL] & bControl; reg_rst_vals[STATUS] |= reg[STATUS] & bTTCClkOK; /**** Update reference values, based on tim version */ if (!isTIM3) { reg_rst_vals[STATUS] |= bTIMOK; if (timVersion < 9) { reg_wr_masks[L1IDL] = 0x0FFF; reg_rst_vals[L1IDL] = 0x0000; reg_rst_vals[L1IDH] = 0x0000; } } /* else if (timVersion > 7) { reg_rst_vals[21] = 0x0FFF; reg_rst_vals[23] = 0x3FFF; } */ /**** TIM3 ************************/ if (isTIM3) { /* ensure the old busys don't interfere with the new ones */ reg_wr_masks[ENABLES] &= !(bEnIntBusy | bEnExtBusy); reg_wr_masks[RUN_ENABLE] &= !(bEnRodBusy | bEnExtRodBusy); if (ttcRQ_present) { if (!QPLL_lockable) qpll_locked = 0; } else qpll_lock_lch = 0; if (debug_level > 0) { printf("debug: ?profile_tim?: orig reg_rst_vals[STATUS3], %d =%04x\n", STATUS3, reg_rst_vals[STATUS3]); printf("debug: ?profile_tim?: orig reg_rst_vals[STAT3_LCH], %d =%04x\n", STAT3_LCH, reg_rst_vals[STAT3_LCH]); printf("debug: ?profile_tim?: orig reg_rst_vals[BUSY_STAT3], %d =%04x\n", BUSY_STAT3, reg_rst_vals[BUSY_STAT3]); } reg_rst_vals[STATUS_LCH] |= (reg[STATUS] & (bBusy | bTTCClkOK )); reg_rst_vals[STATUS3] |= (reg[STATUS3] & (bTTCReady3 | bQpllPresent | qpll_locked | bTtcClkOK3 | bSaClkOK3 )); if (debug_level > 0) { printf("debug: ?profile_tim?: new reg[STATUS3], %d =%04x\n", STATUS3, reg[STATUS3]); printf("debug: ?profile_tim?: new reg_rst_vals[STATUS3], %d =%04x\n", STATUS3, reg_rst_vals[STATUS3]); } reg_rst_vals[STAT3_LCH] |= (reg[STATUS3] & (bTTCReady3 | qpll_lock_lch | bTtcClkOK3 )); if (ttcRQ_present & !TTCrx_ready) reg_rd_masks[STAT3_LCH] &= ~bQpllLocked; if (debug_level > 0) { printf("debug: ?profile_tim?: new reg_rst_vals[STAT3_LCH], %d =%04x\n", STAT3_LCH, reg_rst_vals[STAT3_LCH]); } reg_rst_vals[BUSY_STAT3] |= reg[BUSY_STAT3] & bFFTVLinkStat; if (debug_level > 0) { printf("debug: ?profile_tim?: new reg[BUSY_STAT3], %d =%04x\n", BUSY_STAT3, reg[BUSY_STAT3]); printf("debug: ?profile_tim?: new reg_rst_vals[BUSY_STAT3], %d =%04x\n", BUSY_STAT3, reg_rst_vals[BUSY_STAT3]); } } /*** Main loop starts --------------------------------------------------- */ (void) ask_int("\nALL test: Enter number of long-loops", 1, &nloops) ; printf("\n"); for (i = 0 ; i < nloops ; i ++ ) { errors = 0 ; loop = i ; if (nloops == 1) loop = -1 ; if (reset_level > 0) timReset(Quiet) ; /* *** Added loop 'factor' */ errors += test_loop( "RST", test_rst, 0x5, reset_level, 1 * loop ) ; errors += test_loop( "CLK", test_clk, 0x10, reset_level, 10 * loop ) ; errors += test_loop( "REG", test_reg, 0x9, reset_level, 5 * loop ) ; errors += test_loop( "RAM", test_ram, 0x8, reset_level, 2 * loop ) ; errors += test_loop( "SEQ", test_seq, 0x30, reset_level, 2 * loop ) ; /* after ram */ errors += test_loop( "L1ID", test_l1id, 0x900, reset_level, 10 * loop ) ; errors += test_loop( "BCID", test_bcid, 0x90, reset_level, 5 * loop ) ; errors += test_loop( "SER", test_ser, 0x40, reset_level, 1 * loop ) ; errors += test_loop( "CMD", test_cmd, 0x900, reset_level, 10 * loop ) ; errors += test_loop( "BRST", test_brst, 0x90, reset_level, 5 * loop ) ; if (timID >= TIMID_FPGA) { /*** this is temporary! */ /* errors += test_loop( "VETO", test_veto, 1, reset_level, 2 * loop ) ;*/ errors += test_loop( "RAM1", test_ram1, 0x10, reset_level, 1 * loop ) ; errors += test_loop( "FFTV", test_fftv, 1, reset_level, 1 * loop ) ; } errors += test_loop( "BUSY", test_busy, 0x1000, reset_level, 5 * loop ) ; if (errors > 0) { printf ("ERRORS in loop %d ", loop) ; report_errors ("ALL", errors) ; } error_count += errors ; } /*** when is this used: test_seqalls () ;*/ report_errors ("ALL", error_count) ; } /* --------------------------------------------------------------------------- */ int test_bcid (const int loop) { int error_count = 0 ; int ioff ; for (ioff = 0 ; ioff < 16 ; ioff ++ ) { *reg_BCid = ioff << 12 ; error_count += test_seqcmd (L1A) ; } return error_count ; } /* --------------------------------------------------------------------------- */ int test_brst (const int loop) { int burst_count = 0x1000 ; int error_count = 0 ; timSetupVME() ; /* set reg_freqncy and reg_delays */ *reg_freqncy = 0 ; /* clear random value */ *reg_delays = loop % 0x90 ; /* max delay is 8F */ if (loop == 3) *reg_delays = 0x8F ; error_count += test_burst (burst_count, 2, 0, 0) ; /* int trigger burst */ error_count += checkID (TRG, NONE) ; error_count += test_burst (burst_count, 0, VCAL, CAL) ; /* CAL burst */ error_count += checkID (TRG | CAL, NONE) ; return error_count ; } /* --------------------------------------------------------------------------- */ int test_burst (const int burst_count, const int enables, const int cmdmask, const int outmask) { int error_count = 0 ; *reg_enables = enables ; /* input signals */ *reg_burst = burst_count ; /* set number of triggers in burst */ *reg_command = 0x0200 ; /* set vBurstMode bit */ *reg_L1lo = 0xFFFF ; /* extra F for new 16-bit register */ *reg_L1hi = 0x00FF ; /* reset L1ID */ timWait_seqBusys () ; /* why is this needed !!! ? ***/ /*** try longer timeout */ timSetupSeq (0x8000, TIM_RAM_SIZE) ; *reg_output = 0 ; *reg_command = 0x0600 ; /* set vBurstGo (leaving vBurstMode set) */ *reg_command = 0x0600 | cmdmask ; /* maybe generate a CAL: set vCAL bit */ /* Poll the BurstBUSY Status bit until the burst is done */ /* if (wait_state_timeout(10000, STATUS, 0x0010, 0x0000) == 0) *//* 10 seconds time-out*/ if (wait_state_timeout(10000, BUSY_STAT3, bBurstBusy3, bBurstBusy3) == 0) /* try new burst bit*/ { printf("ERROR: BRST: cmd %04x BurstBusy TIMEOUT: reg_status %04x mask %04x, BUSY_STAT3 %04x mask %04x, delay %04x.\n", cmdmask, *reg_status, 0x0010, reg[BUSY_STAT3], bBurstBusy3, *reg_delays) ; error_count ++ ; } timWait_seqBusys () ; /* avoid events in sink from last time */ *reg_sequenc = 0x0000 ; *reg_enables = 0x0000 ; /* disable all input signals */ if (debug_level > 0) printf ("debug: L1ID %06X, BCid %03X\n", timGetL1ID(*reg_L1lo, *reg_L1hi), *reg_BCid) ; *reg_command = 0x0000 ; /* clear vBurstMode and vBurstGo */ (void) checkID (PresetNextL1ID, burst_count-1) ; /* reset */ error_count += timCheck ("BRST: reg_output want", *reg_output, TRG | outmask) ; if (debug_level > 0) { printf("debug0:\n"); timDump (TIM_RAM_SIZE, 1) ; } return error_count ; } /* --------------------------------------------------------------------------- */ int test_busy (const int loop) { int bout, busy, mask, rods, stat, slot, i ; int errors = 0 ; if (loop == 0) { for (i = 0 ; i < TIM_CMD_SIZE ; i ++ ) { buffer [i] = 0x80 ; ram_ptr[i] = 0x80 ; /* keep Spare line asserted for Test card */ } buffer [1] = 0xFF ; ram_ptr[1] = 0xFF ; /* 0 now gives sink error */ buffer [2] = 0xC0 ; ram_ptr[2] = 0xC0 ; /* double length signal */ errors += test_sink (buffer, TIM_CMD_SIZE + 1, TIM_CMD_SIZE) ; /* leave all seq cmds running */ *reg_RODheld = 0 ; /* reset */ *reg_sequenc = 0 ; /* is this needed? YES it is! */ *reg_sequenc = 0x4cFF ; /* cycling gives errors beyond end */ printf ("ROD BUSY busy %04x, held %04x, moni %04x.\n", *reg_RODbusy, *reg_RODheld, *reg_RODmoni) ; rods = *reg_RODheld ; if (rods == 0) printf ("No ROD BUSY found\n") ; else { for (i = 0 ; i < 16 ; i ++ ) { if (rods & 01) { slot = i + 5 ; if (slot > 12) slot ++ ; printf ("ROD BUSY found at bit %2d, slot %2d\n", i, slot) ; } rods >>= 1 ; } } } *reg_EnRun = 0x0080 ; /* Enable ROD BUSY */ for (i = 0 ; i < 16 ; i ++ ) { mask = 01 << i ; *reg_RODmask = mask ; busy = *reg_RODbusy ; rods = busy & mask ; stat = *reg_status ; bout = stat & 0x0008 ; if ((bout == 0 && rods != 0) || (bout != 0 && rods == 0)) { printf ("ERROR: ROD BUSY mask %04x, busy %04x, stat %04x.\n", mask, busy, stat) ; errors ++ ; } } return errors ; } /* --------------------------------------------------------------------------- */ int test_clk (const int loop) { int error_count = 0 ; int i ; for (i = 0 ; i < 0x40 ; i ++) { *reg_delays = i << 8 ; error_count += check_clk () ; } return error_count ; } /* --------------------------------------------------------------------------- */ int test_cmd (const int loop) { int error_count = 0 ; timSetupVME() ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VECR, ECR) ; /* ECR resets L1ID */ error_count += test_cmdbit (VBCR, BCR) ; error_count += test_cmdbit (VFER, FER) ; error_count += test_cmdbit (VSPA, SPA) ; error_count += test_cmdbit (VCAL, CAL | TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; error_count += test_cmdbit (VTRG, TRG) ; return error_count ; } /* --------------------------------------------------------------------------- */ int test_cmdbit (const int cmdmask, const int outmask) { int error = 0 ; *reg_output = 0 ; /* reset */ *reg_command = 0 ; /* clear for repeated edge command */ *reg_command = cmdmask ; if (wait_state_timeout(10, STATUS, IntBusy, 0x0000) == 0) /* 10 ms timeout */ { printf("CMD: IntBusy TIMEOUT: reg_output %02x, want %02x.\n", *reg_output, outmask) ; error = 1 ; } else /* wait for command to complete, especially CAL */ { if (wait_state_timeout(10, TIM_OUTPUT, outmask, outmask) == 0) printf("CMD: output TIMEOUT: reg_output %02x, want %02x.\n", *reg_output, outmask) ; error = checkID (outmask, NONE) ; error += timCheck ("CMD : reg_output want", *reg_output, outmask) ; } if (debug_level > 2) printf ("debug3: test_cmdbit: cmdmask %02x, outmask %02X, L1ID %06X, BCid %03X\n", cmdmask, outmask, timGetL1ID(*reg_L1lo, *reg_L1hi), *reg_BCid) ; return error ; } /* --------------------------------------------------------------------------- */ int test_cmdsink (const int cmdmask, const int outmask) { int delay, error = 0 ; int indexL1A ; int size ; delay = (*reg_delays & 0xFF) + 4 ; /* max delay is 8F */ size = TIM_CMD_SIZE + delay ; if (cmdmask == VCAL) size = TIM_RAM_SIZE ; timSetupSeq (0x8000, size) ; if ((debug_level > 0) && (timID >= TIMID_FPGA)) { printf ("debug(tim3): test_cmdsink: src addr %04x, snk addr %04x\n", *reg_srcAddr, *reg_snkAddr) ; } /* how do we tell if seq didn't run ***/ /***if (cmdmask == VCAL && timID < TIMID_FPGA)*/ if (cmdmask == VCAL && getVersion() < 10) { error += test_cmdbit (VTRG, TRG) ; } error += test_cmdbit (cmdmask, outmask) ; if (debug_level > 0 && timID >= TIMID_FPGA) { printf ("debug(tim3): test_cmdsink: src addr %04x, snk addr %04x\n", *reg_srcAddr, *reg_snkAddr) ; } if (error == 0) { error += checkSink (size, NONE, &indexL1A) ; if (cmdmask == VTRG) error += timCheck ("SINK:(scan,delay)", indexL1A, delay) ; if (error != 0) printf ("test_cmdsink scan errors: cmdmask %02x, outmask %02X, delays %04x\n", cmdmask, outmask, *reg_delays) ; } if (debug_level > 0) { printf ("debug: test_cmdsink: src addr %04x, snk addr %04x\n", *reg_srcAddr, *reg_snkAddr) ; timDump (size, 1) ; } return error ; } /* --------------------------------------------------------------------------- */ int test_fftv (const int loop) { unsigned int error_count=0 ; int i, l1id, fv_diff=0, nofv_diff=0 ; int burst_len = 0x5000; if (debug_level > 1) printf("Entering: test_fftv\n"); reg[FREQUENCY] = 0x07; /* 0x07=50 kHz */ reg[ENABLES] = bEnIntTRIG; reg[ENABLES3] |= bPreBusyBurstEn; reg[BURST] = burst_len; reg[DEBUG_CTL] &= !bFVdisable; /* Ensure FFTV enable */ reg[COMMAND] = 0x0200; /* Burst Mode */ reg[L1IDL] = 0x0; reg[L1IDH] = 0x0; reg[COMMAND] = 0x0600; /* Burst Go */ (void)wait_state_timeout(10000, BUSY_STAT3, bBurstBusy3, bBurstBusy3); l1id = (reg[L1IDH]<<16) + reg[L1IDL]; fv_diff = abs(burst_len - l1id); printf("With FFTV On: Burst Len %4x, L1ID %4x, Diff %d\n", burst_len, l1id, fv_diff); if (fv_diff < 100) { printf("ERROR! fv_diff near-zero (= %d)\n",fv_diff); error_count++; } if ((reg[BUSY_STAT3] & bFFTVLinkStat) == 0) { printf("No FFTV link inserted: Cannot test for non-operation.\n"); } else { reg[DEBUG_CTL] |= bFVdisable; /* FFTV disable */ reg[COMMAND] = 0x0200; /* Burst Mode */ reg[L1IDL] = 0x0; reg[L1IDH] = 0x0; reg[COMMAND] = 0x0600; /* Burst Go */ (void)wait_state_timeout(10000, BUSY_STAT3, bBurstBusy3, bBurstBusy3); l1id = (reg[L1IDH]<<16) + reg[L1IDL]; nofv_diff = abs(burst_len - l1id); printf("With No FFTV: Burst Len %4x, L1ID %4x, Diff %d\n", burst_len, l1id, nofv_diff); if (abs(fv_diff - nofv_diff) < 10) { printf("ERROR! fv_diff %d, nofv_diff %d\n", fv_diff, nofv_diff); error_count++; } } if (debug_level > 1) printf("Leaving: test_fftv\n"); /* tidy up */ reg[ENABLES] &= !bEnIntTRIG; reg[ENABLES3] &= !bPreBusyBurstEn; reg[DEBUG_CTL] &= !bFVdisable; /* Ensure FFTV enable */ reg[COMMAND] = 0x0; /* Burst Mode */ return error_count ; } /* --------------------------------------------------------------------------- */ int test_l1id (const int loop) { int error_count = 0 ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VECR, ECR) ; /* ECR resets L1ID */ error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; if (debug_level > 2) printf("\ndebug3: Run A - mid roll over\n") ; (void) checkID (PresetNextL1ID, 0x000FFE) ; /* reset */ *reg_L1lo = 0x0FFD ; /* order affected result! */ *reg_L1hi = 0 ; if (debug_level > 2) printf("debug3: Starting at l1id %06x.\n", timGetL1ID(*reg_L1lo, *reg_L1hi)) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; if (debug_level > 2) printf("\ndebug3: Run 2 - full roll over\n") ; (void) checkID (PresetNextL1ID, 0xFFFFFE) ; /* reset */ *reg_L1hi = 0x0FFF ; /* order affected result! */ *reg_L1lo = 0xFFFD ; /* extra F for new 16-bit register */ if (debug_level > 2) printf("debug3: Starting at l1id %06x.\n", timGetL1ID(*reg_L1lo, *reg_L1hi)) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; error_count += test_cmdbit (VTRG, L1A) ; return error_count ; } /* --------------------------------------------------------------------------- */ int test_ram (const int loop) { unsigned int error_count ; int i ; if (debug_level > 1) dump16 ("debug2: RAM contents:", ram_ptr, 16) ; *reg_sequenc = 0x2200 ; /* reset - otherwise sink can overwrite - new here */ for (i = 0 ; i < TIM_RAM_SIZE ; i++) buffer[i] = ram_ptr[i] ; /* RAM values have changed */ error_count = test_block (ram_ptr, buffer, TIM_RAM_SIZE, loop, 1, RAM_mask) ; return error_count ; } /* --------------------------------------------------------------------------- */ int test_ram1 (const int loop) { volatile unsigned short* ram1_ptr ; /*volatile unsigned short* tst1_ptr ; volatile unsigned short* tst2_ptr ; */ int errors = 0 ; ram1_ptr = memory_ptr + 0x1000 / 2 ; /* 16-bit words */ /*** no longer available ... */ /*tst1_ptr = memory_ptr + 0x0178 / 2 ;*/ /* FPGA1 test reg */ /*tst2_ptr = memory_ptr + 0x0078 / 2 ;*/ /* FPGA2 test reg */ buffer1[0] = ram1_ptr[0] ; /* buffer1[0] value changes below */ errors += test_block (ram1_ptr, buffer1, FPGA1_RAM_SIZE, loop, 1, RAM_mask) ; /*errors += test_block (tst1_ptr, buffer1, 1, loop, 1, RAM_mask) ; errors += test_block (tst2_ptr, buffer1, 1, loop, 1, RAM_mask) ; */ return errors ; } /* --------------------------------------------------------------------------- */ int test_reg (const int loop) { unsigned int error_count ; int i ; /* address and size of RAM block to test */ if (debug_level > 0) { printf ("debug: Entering test_reg...\n"); printf ("Testing %dd registers\n", register_words) ; dump16 ("Register mask contents:", reg_wr_masks, register_words) ; dump16 ("Register contents:", reg, register_words) ; } *reg_command = 0 ; /* cmd reg esp runmode */ *reg_sequenc = 0x2200 ; /* reset - otherwise sink can overwrite */ for (i = 0 ; i < register_words ; i++) buffer[i] = reg[i] ; /* register values have changed */ error_count = test_block (reg, buffer, register_words, loop, register_words, reg_wr_masks) ; timReset(Silent) ; if (debug_level > 0) printf ("debug: Leaving test_reg...\n"); return error_count ; } /* --------------------------------------------------------------------------- */ int test_rst (const int loop) { int error_count = 0 ; unsigned short word_read ; int i ; timReset(Silent); for (i = 0 ; i < register_words ; i ++) { word_read = reg[i] ; if ((word_read & reg_rd_masks[i]) != (reg_rst_vals[i] & reg_rd_masks[i])) { printf ("read %04x, mask %04x, want %04x, reg_id %d, byte %x, loop %d\n", word_read, reg_rd_masks[i], reg_rst_vals[i], i, 2*i, loop) ; error_count ++ ; } } return error_count ; } /* --------------------------------------------------------------------------- */ int test_seq (const int loop) { unsigned int error_count = 0 ; if (debug_level > 0) printf ("debug: Entering test_seq...\n"); timSetupVME() ; /* ensure sequencer is off - is it needed? */ if (debug_level > 1) dump16 ("debug2: RAM contents:", ram_ptr, 16) ; /* ram_ptr[0] = 0x00ff ; buffer [0] = 0x00ff ; timReset(Quiet) ; */ error_count += test_sink (buffer, TIM_RAM_SIZE, TIM_RAM_SIZE / 2) ; error_count += test_seqbits () ; error_count += test_seqcmds () ; /* moved out of loop for byte zero testing */ if (debug_level > 0) printf ("debug: Leaving test_seq...\n"); return error_count ; } /* --------------------------------------------------------------------------- */ void test_seqalls (void) { int rods, slot, i ; int error_count = 0 ; if (debug_level > 0) printf ("debug: Entering test_seqalls...\n"); for (i = 0 ; i < TIM_CMD_SIZE ; i ++ ) { buffer [i] = 0 ; ram_ptr[i] = 0 ; } buffer [1] = 0xFF ; ram_ptr[1] = 0xFF ; /* 0 now gives sink error */ buffer [2] = 0x80 ; ram_ptr[2] = 0x80 ; error_count += test_sink (buffer, TIM_CMD_SIZE + 1, TIM_CMD_SIZE) ; report_errors ("SEQall", error_count) ; /* leave all seq cmds running */ *reg_RODheld = 0 ; /* reset */ *reg_sequenc = 0 ; /* is this needed? YES it is! */ *reg_sequenc = 0x4cFF ; /* cycling gives errors beyond end */ rods = *reg_RODheld ; if (rods == 0) printf ("No ROD BUSY found\n") ; else { for (i = 0 ; i < 16 ; i ++ ) { if (rods & 01) { slot = i + 5 ; if (slot > 12) slot ++ ; printf ("ROD BUSY found at bit %2d, slot %2d\n", i, slot) ; } rods >>= 1 ; } } if (debug_level > 0) printf ("debug: Leaving test_seqalls...\n"); } /* --------------------------------------------------------------------------- */ int test_seqbits (void) { /* Fill memory with pattern */ int ibit ; int i ; int error_count = 0 ; if (debug_level > 0) printf ("debug: Entering test_seqbits...\n"); for (ibit = 0 ; ibit < 8 ; ibit++) { for (i = 0 ; i < TIM_CMD_SIZE ; i ++ ) { buffer [i] = 0 ; ram_ptr[i] = 0 ; } buffer [TIM_CMD_SIZE] = 1 << ibit ; ram_ptr[TIM_CMD_SIZE] = 1 << ibit ; error_count += test_sink (buffer, TIM_CMD_SIZE + 1, TIM_CMD_SIZE) ; } reg[COMMAND] = 0 ; /* clear for repeated edge command */ reg[COMMAND] = VECR ; (void) checkID (PresetNextL1ID, 0) ; /* reset */ if (debug_level > 0) printf ("debug: Leaving test_seqalls...\n"); return error_count ; } /* --------------------------------------------------------------------------- */ int test_seqcmd (const int mask) { int i, ioff, bcid ; int jump, jBCR, jCMD ; int error_count ; if (debug_level > 0) printf ("debug: Entering test_seqcmd...\n"); /* BCID = 0 corresponds to jump = 1 and ioff = 0 */ jump = 18 ; /* bigger than BCID offset avoids negative BCIDs */ jBCR = 1 ; /* 0 now gives sink error */ jCMD = jump + jBCR ; *reg_sequenc = 0 ; /* write generates commands if enabled */ if (debug_level > 2) printf ("debug3: test_seqcmd: mask %02X, L1lo %03X.\n", mask, *reg_L1lo) ; for (i = 0 ; i < TIM_CMD_SIZE + jCMD ; i ++ ) { buffer [i] = 0 ; ram_ptr[i] = 0 ; } buffer [jBCR] = BCR ; ram_ptr[jBCR] = BCR ; buffer [jCMD] = mask ; ram_ptr[jCMD] = mask ; if (debug_level > 2) printf ("debug3: test_seqcmd: mask %02X, L1lo %03X.\n", mask, *reg_L1lo) ; error_count = test_sink (buffer, TIM_CMD_SIZE + 1, TIM_CMD_SIZE) ; /*** when does bcid fail? relationship with neg value? delayed BCR must be after L1A */ ioff = *reg_BCid >> 12 ; bcid = (jump - ioff + 0x1000) % 0x1000 ; bcid -- ; /***was *** removed to get FPGA aligned - may break PLD*/ /* if (timID < TIMID_FPGA) bcid -- ; */ /* -1 for PLD ox9 -> change FPGA ***/ error_count += checkID (mask, bcid) ; if (debug_level > 2) printf ("debug3: test_seqcmd: mask %02X, L1lo %03X, BCid %03X.\n", mask, *reg_L1lo, *reg_BCid) ; if (debug_level > 0) printf ("debug: Leaving test_seqcmd...\n"); return error_count ; } /* --------------------------------------------------------------------------- */ int test_seqcmds (void) { int error_count = 0 ; if (debug_level > 0) printf ("debug: Entering test_seqcmds...\n"); error_count += test_seqcmd (L1A) ; error_count += test_seqcmd (L1A) ; error_count += test_seqcmd (ECR) ; error_count += test_seqcmd (L1A) ; error_count += test_seqcmd (L1A) ; if (debug_level > 2) { printf("debug3:\n"); timDump (TIM_CMD_SIZE, 1) ; } if (debug_level > 0) printf ("debug: Leaving test_seqcmds...\n"); return error_count ; } /* --------------------------------------------------------------------------- */ int test_ser (const int loop) { int error_count = 0 ; if (debug_level > 0) printf ("debug: Entering test_ser...\n"); timSetupVME() ; *reg_TTid = loop ; *reg_delays = loop % 0x90 ; /* max delay is 8F */ if (loop == 1) *reg_delays = 0x10 ; if (loop == 2) *reg_delays = 0x8F ; error_count += test_cmdsink (VTRG, TRG) ; error_count += test_cmdsink (VCAL, CAL | TRG) ; *reg_delays = 0 ; if (debug_level > 0) printf ("debug: Leaving test_ser...\n"); return error_count ; } /* --------------------------------------------------------------------------- */ void test_set (void) { debug_level = 0 ; (void) ask_int ("Enter debug level", debug_level, &debug_level) ; (void) ask_int ("Enter reset level", reset_level, &reset_level) ; #ifdef __alpha printf ("long %ld int %ld short %ld char %ld bytes\n", #else printf ("long %d int %d short %d char %d bytes\n", #endif sizeof(long), sizeof(int), sizeof(short), sizeof(char)) ; } /* --------------------------------------------------------------------------- */ int test_veto (const int loop) { int burst_count = 10000 ; int errors = 0 ; timReset(Loud); timSetupVME() ; reg[FREQUENCY] = 1; /* 60kHz */ reg[DELAYS] = loop % 0x90; /* max delay is 8F */ reg[DEBUG_CTL] &= !(bFVdisable | bSARBdisable); /* Enable Veto, Disable SA-Mode RodBusy */ /*** should change to un-disable veto */ /* Test with Random Triggers */ /*--------------------------------*/ reg[FV_COUNTL] = 0; /* Veto count lo -- write clears all veto count registers*/ reg[BCOUNTL] = 0; /* Veto count lo -- write clears all veto count registers*/ reg[BSTAT3_LCH] = 0; /* Busy Status Change Latch Clear */ /*if (debug_level > 0)*/ printf("test_veto: Random Trig Test Starting ...\n"); errors += test_burst (burst_count, 0x12, 0, 0) ; /* random */ /*if (debug_level > 0)*/ printf ("debug1: test_veto (random trg):\n busy_stat3 %04x, bstat3_lch %04x, status %04x, status3 %04x,\n veto_countl %d, busy_countl %d, L1ID %d\n", reg[BUSY_STAT3], reg[BSTAT3_LCH], reg[STATUS], reg[STATUS3], reg[FV_COUNTL], reg[BCOUNTL], timGetL1ID(*reg_L1lo, *reg_L1hi)) ; /* Test with Fixed Freq triggers */ /*--------------------------------*/ reg[FV_COUNTL] = 0; /* Veto count lo -- write clears all veto count registers*/ reg[BCOUNTL] = 0; /* Veto count lo -- write clears all veto count registers*/ reg[BSTAT3_LCH] = 0; /* Busy Status Change Latch Clear */ /*if (debug_level > 0)*/ printf("test_veto: Fixed Freq Trig Test Starting ...\n"); errors += test_burst (burst_count, 0x02, 0, 0) ; /* fixed */ /*if (debug_level > 0)*/ printf ("debug1: test_veto (fixed trg):\n busy_stat3 %04x, bstat3_lch %04x, status %04x, status3 %04x,\n veto_countl %d, busy_countl %d, L1ID %d\n", reg[BUSY_STAT3], reg[BSTAT3_LCH], reg[STATUS], reg[STATUS3], reg[FV_COUNTL], reg[BCOUNTL], timGetL1ID(*reg_L1lo, *reg_L1hi)) ; return errors ; }