SCT latency budget

Survey of SCT latency budget

The overall latency is the time from the interaction until the L1Accept trigger signal is received by the front-end pipeline. The table is a summary of the latency in Bunch Crossings and nanoseconds, including which group has the final say in some sense on the latency value.

BC ns Latency Item Latency Responsibility

77.9 1947 Central Trigger Processor output ATLAS Level-1 Trigger
0.4 10 Fanout module ATLAS Timing, Trigger & Control
1.6 40 8m cable . . . . . CTP -> TTCvi ATLAS Technical Coordination
0.1 3 TTC vme interface module ATLAS Timing, Trigger & Control
0.1 3 0.6m cable . . TTCvi -> TTCvx ATLAS Timing, Trigger & Control
0.9 22 TTC vme transmitter module ATLAS Timing, Trigger & Control
6.4 160 32m fibre . . . TTCvx -> TTCrx ATLAS Technical Coordination
3.0 75 TTC receiver chip ATLAS Timing, Trigger & Control
2.0 50 Timing Interface Module SCT Off-Detector Electronics
0.2 5 Backplane of ROD crate SCT Off-Detector Electronics
3.0 75 Read-Out Driver module SCT Off-Detector Electronics
0.5 13 Back Of Crate card SCT Off-Detector Electronics
2.0 50 Bi-Phase Mark chip SCT Links
19.4 485 97m fibre . . . ROD -> Detector ATLAS Technical Coordination
1.0 25 DORIC decoder chip SCT Links
7.0 175 ABC(D) readout chip SCT Front-End Electronics
6.5 162 SCT Contingency SCT Electronics Coordinator

132.0 3300 Total ( = Pipeline Length )

BC	ns	Latency Item	Latency Responsibility
77.9	1947	Central Trigger Processor output	ATLAS Level-1 Trigger
0.4	10	Fanout module	ATLAS Timing, Trigger & Control
1.6	40	8m cable . . . . . CTP -> TTCvi	ATLAS Technical Coordination
0.1	3	TTC vme interface module	ATLAS Timing, Trigger & Control
0.1	3	0.6m cable . . TTCvi -> TTCvx	ATLAS Timing, Trigger & Control
0.9	22	TTC vme transmitter module	ATLAS Timing, Trigger & Control
6.4	160	32m fibre . . . TTCvx -> TTCrx	ATLAS Technical Coordination
3.0	75	TTC receiver chip	ATLAS Timing, Trigger & Control
2.0	50	Timing Interface Module	SCT Off-Detector Electronics
0.2	5	Backplane of ROD crate	SCT Off-Detector Electronics
3.0	75	Read-Out Driver module	SCT Off-Detector Electronics
0.5	13	Back Of Crate card	SCT Off-Detector Electronics
2.0	50	Bi-Phase Mark chip	SCT Links
19.4	485	97m fibre . . . ROD -> Detector	ATLAS Technical Coordination
1.0	25	DORIC decoder chip	SCT Links
7.0	175	ABC(D) readout chip	SCT Front-End Electronics
6.5	162	SCT Contingency	SCT Electronics Coordinator

132.0	3300	Total ( = Pipeline Length )

SCT L1 Trigger Latency Budget Specification ( pdf or ps )
Alex Grillo's overview of SCT L1 Trigger latency and comparison with TRT ( pdf or ps )
The 97m fibre length and routing is under review: Jan Troska's SCT fibre routing document
(superseded drawings: pdf or ps or
The biggest uncertainty is the position of the ROD racks in USA15
The 40m (=8+32) is the worst case cable/fibre length from CTP fanout to ROD crate.
The TTCvi and TTCvx may be nearer to the ROD crates than in the table.
More details (SCT_latency.txt) ; also email archive and latency talk
L1 Trigger latency ( pdf or ps ) ; TTC latency
SCT Link fibre installation (old draft)

Last update: 23 June 2004 (last budget change: 6 June 1999)

John Lane (UCL) email: jbl@hep.ucl.ac.uk

http://www.hep.ucl.ac.uk/~jbl/SCT/SCT_latency.html