-- generated by newgenasym Mon Mar 03 14:20:07 2008

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity \rj45-2x4port\ is
    port (    
	\1la\:     INOUT  STD_LOGIC;    
	\1lb\:     INOUT  STD_LOGIC;    
	\1lc\:     INOUT  STD_LOGIC;    
	\1ld\:     INOUT  STD_LOGIC;    
	\1ua\:     INOUT  STD_LOGIC;    
	\1ub\:     INOUT  STD_LOGIC;    
	\1uc\:     INOUT  STD_LOGIC;    
	\1ud\:     INOUT  STD_LOGIC;    
	\2la\:     INOUT  STD_LOGIC;    
	\2lb\:     INOUT  STD_LOGIC;    
	\2lc\:     INOUT  STD_LOGIC;    
	\2ld\:     INOUT  STD_LOGIC;    
	\2ua\:     INOUT  STD_LOGIC;    
	\2ub\:     INOUT  STD_LOGIC;    
	\2uc\:     INOUT  STD_LOGIC;    
	\2ud\:     INOUT  STD_LOGIC;    
	\3la\:     INOUT  STD_LOGIC;    
	\3lb\:     INOUT  STD_LOGIC;    
	\3lc\:     INOUT  STD_LOGIC;    
	\3ld\:     INOUT  STD_LOGIC;    
	\3ua\:     INOUT  STD_LOGIC;    
	\3ub\:     INOUT  STD_LOGIC;    
	\3uc\:     INOUT  STD_LOGIC;    
	\3ud\:     INOUT  STD_LOGIC;    
	\4la\:     INOUT  STD_LOGIC;    
	\4lb\:     INOUT  STD_LOGIC;    
	\4lc\:     INOUT  STD_LOGIC;    
	\4ld\:     INOUT  STD_LOGIC;    
	\4ua\:     INOUT  STD_LOGIC;    
	\4ub\:     INOUT  STD_LOGIC;    
	\4uc\:     INOUT  STD_LOGIC;    
	\4ud\:     INOUT  STD_LOGIC;    
	\5la\:     INOUT  STD_LOGIC;    
	\5lb\:     INOUT  STD_LOGIC;    
	\5lc\:     INOUT  STD_LOGIC;    
	\5ld\:     INOUT  STD_LOGIC;    
	\5ua\:     INOUT  STD_LOGIC;    
	\5ub\:     INOUT  STD_LOGIC;    
	\5uc\:     INOUT  STD_LOGIC;    
	\5ud\:     INOUT  STD_LOGIC;    
	\6la\:     INOUT  STD_LOGIC;    
	\6lb\:     INOUT  STD_LOGIC;    
	\6lc\:     INOUT  STD_LOGIC;    
	\6ld\:     INOUT  STD_LOGIC;    
	\6ua\:     INOUT  STD_LOGIC;    
	\6ub\:     INOUT  STD_LOGIC;    
	\6uc\:     INOUT  STD_LOGIC;    
	\6ud\:     INOUT  STD_LOGIC;    
	\7la\:     INOUT  STD_LOGIC;    
	\7lb\:     INOUT  STD_LOGIC;    
	\7lc\:     INOUT  STD_LOGIC;    
	\7ld\:     INOUT  STD_LOGIC;    
	\7ua\:     INOUT  STD_LOGIC;    
	\7ub\:     INOUT  STD_LOGIC;    
	\7uc\:     INOUT  STD_LOGIC;    
	\7ud\:     INOUT  STD_LOGIC;    
	\8la\:     INOUT  STD_LOGIC;    
	\8lb\:     INOUT  STD_LOGIC;    
	\8lc\:     INOUT  STD_LOGIC;    
	\8ld\:     INOUT  STD_LOGIC;    
	\8ua\:     INOUT  STD_LOGIC;    
	\8ub\:     INOUT  STD_LOGIC;    
	\8uc\:     INOUT  STD_LOGIC;    
	\8ud\:     INOUT  STD_LOGIC;    
	FX1:       INOUT  STD_LOGIC;    
	FX2:       INOUT  STD_LOGIC;    
	FX3:       INOUT  STD_LOGIC;    
	FX4:       INOUT  STD_LOGIC;    
	FX5:       INOUT  STD_LOGIC;    
	FX6:       INOUT  STD_LOGIC);
end \rj45-2x4port\;
