-- generated by newgenasym Wed Dec 08 11:14:15 2010

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity \3d3225\ is
    port (    
	GND:       IN     STD_LOGIC;    
	\in\:      IN     STD_LOGIC;    
	OUT1:      IN     STD_LOGIC;    
	OUT2:      IN     STD_LOGIC;    
	OUT3:      IN     STD_LOGIC;    
	OUT4:      IN     STD_LOGIC;    
	OUT5:      IN     STD_LOGIC;    
	VDD:       IN     STD_LOGIC);
end \3d3225\;
