-- generated by newgenasym Wed Sep 22 09:52:05 2010

library ieee;
use     ieee.std_logic_1164.all;
use     work.all;
entity \sk-din41612-96\ is
    port (    
	\10a\:     INOUT  STD_LOGIC;    
	\10b\:     INOUT  STD_LOGIC;    
	\10c\:     INOUT  STD_LOGIC;    
	\11a\:     INOUT  STD_LOGIC;    
	\11b\:     INOUT  STD_LOGIC;    
	\11c\:     INOUT  STD_LOGIC;    
	\12a\:     INOUT  STD_LOGIC;    
	\12b\:     INOUT  STD_LOGIC;    
	\12c\:     INOUT  STD_LOGIC;    
	\13a\:     INOUT  STD_LOGIC;    
	\13b\:     INOUT  STD_LOGIC;    
	\13c\:     INOUT  STD_LOGIC;    
	\14a\:     INOUT  STD_LOGIC;    
	\14b\:     INOUT  STD_LOGIC;    
	\14c\:     INOUT  STD_LOGIC;    
	\15a\:     INOUT  STD_LOGIC;    
	\15b\:     INOUT  STD_LOGIC;    
	\15c\:     INOUT  STD_LOGIC;    
	\16a\:     INOUT  STD_LOGIC;    
	\16b\:     INOUT  STD_LOGIC;    
	\16c\:     INOUT  STD_LOGIC;    
	\17a\:     INOUT  STD_LOGIC;    
	\17b\:     INOUT  STD_LOGIC;    
	\17c\:     INOUT  STD_LOGIC;    
	\18a\:     INOUT  STD_LOGIC;    
	\18b\:     INOUT  STD_LOGIC;    
	\18c\:     INOUT  STD_LOGIC;    
	\19a\:     INOUT  STD_LOGIC;    
	\19b\:     INOUT  STD_LOGIC;    
	\19c\:     INOUT  STD_LOGIC;    
	\1a\:      INOUT  STD_LOGIC;    
	\1b\:      INOUT  STD_LOGIC;    
	\1c\:      INOUT  STD_LOGIC;    
	\20a\:     INOUT  STD_LOGIC;    
	\20b\:     INOUT  STD_LOGIC;    
	\20c\:     INOUT  STD_LOGIC;    
	\21a\:     INOUT  STD_LOGIC;    
	\21b\:     INOUT  STD_LOGIC;    
	\21c\:     INOUT  STD_LOGIC;    
	\22a\:     INOUT  STD_LOGIC;    
	\22b\:     INOUT  STD_LOGIC;    
	\22c\:     INOUT  STD_LOGIC;    
	\23a\:     INOUT  STD_LOGIC;    
	\23b\:     INOUT  STD_LOGIC;    
	\23c\:     INOUT  STD_LOGIC;    
	\24a\:     INOUT  STD_LOGIC;    
	\24b\:     INOUT  STD_LOGIC;    
	\24c\:     INOUT  STD_LOGIC;    
	\25a\:     INOUT  STD_LOGIC;    
	\25b\:     INOUT  STD_LOGIC;    
	\25c\:     INOUT  STD_LOGIC;    
	\26a\:     INOUT  STD_LOGIC;    
	\26b\:     INOUT  STD_LOGIC;    
	\26c\:     INOUT  STD_LOGIC;    
	\27a\:     INOUT  STD_LOGIC;    
	\27b\:     INOUT  STD_LOGIC;    
	\27c\:     INOUT  STD_LOGIC;    
	\28a\:     INOUT  STD_LOGIC;    
	\28b\:     INOUT  STD_LOGIC;    
	\28c\:     INOUT  STD_LOGIC;    
	\29a\:     INOUT  STD_LOGIC;    
	\29b\:     INOUT  STD_LOGIC;    
	\29c\:     INOUT  STD_LOGIC;    
	\2a\:      INOUT  STD_LOGIC;    
	\2b\:      INOUT  STD_LOGIC;    
	\2c\:      INOUT  STD_LOGIC;    
	\30a\:     INOUT  STD_LOGIC;    
	\30b\:     INOUT  STD_LOGIC;    
	\30c\:     INOUT  STD_LOGIC;    
	\31a\:     INOUT  STD_LOGIC;    
	\31b\:     INOUT  STD_LOGIC;    
	\31c\:     INOUT  STD_LOGIC;    
	\32a\:     INOUT  STD_LOGIC;    
	\32b\:     INOUT  STD_LOGIC;    
	\32c\:     INOUT  STD_LOGIC;    
	\3a\:      INOUT  STD_LOGIC;    
	\3b\:      INOUT  STD_LOGIC;    
	\3c\:      INOUT  STD_LOGIC;    
	\4a\:      INOUT  STD_LOGIC;    
	\4b\:      INOUT  STD_LOGIC;    
	\4c\:      INOUT  STD_LOGIC;    
	\5a\:      INOUT  STD_LOGIC;    
	\5b\:      INOUT  STD_LOGIC;    
	\5c\:      INOUT  STD_LOGIC;    
	\6a\:      INOUT  STD_LOGIC;    
	\6b\:      INOUT  STD_LOGIC;    
	\6c\:      INOUT  STD_LOGIC;    
	\7a\:      INOUT  STD_LOGIC;    
	\7b\:      INOUT  STD_LOGIC;    
	\7c\:      INOUT  STD_LOGIC;    
	\8a\:      INOUT  STD_LOGIC;    
	\8b\:      INOUT  STD_LOGIC;    
	\8c\:      INOUT  STD_LOGIC;    
	\9a\:      INOUT  STD_LOGIC;    
	\9b\:      INOUT  STD_LOGIC;    
	\9c\:      INOUT  STD_LOGIC);
end \sk-din41612-96\;
