ZEUS - MVD : C + C MASTER PCB
		=============================

	CHANGES & ADDITIONS TO THE CIRCUIT DIAGRAM MASTERS
	==================================================


			MP-UCL, 09 June 1999
			--------------------


1)	Diag. 001	CHANGE the four backplane J2 signals from "NSLAVE..."
				to "NBP..."

2)			ADD "NBP_RESET", "BP_ABORT", "BP_ACCEPT"


3)	Diag. 002	CHANGE the four inputs to U7 as in 1) above


4)			ADD to U7 input "NBP_RESET"	
			ADD to U7 output "NBPLANE_RESET"

5)			ADD U76 = 74LS541
			new inputs "BP_ABORT", "BP_ACCEPT"
			new outputs "BPLANE_ABORT", "BPLANE_ACCEPT"


6)	Diag. 004	CHANGE U21 inputs	"F_ERROR" to F_ERROROUT",
		 				"BUSY"	  to "BUSYOUT"


7-12)	Diag. 005-009	CHANGE inputs A0, A1 to DA(0), DA(1)


13)	Diag. 010	2x SILs ( RNxx & RNxx ) to be in sockets

			ADD legend :	"NOTE: REMOVE SIL IF LVDS 
					------ ADAPTOR IC IS USED"


14)	Diag. 012	CHANGE U57 input "PLL_OUT2" to "CLK_54" 


15)			CHANGE U59 input "CLK_5" to "CLK_56"


16)	Diag. 013	ADD to U61	new input from "DOUT2"
					new output "LEDCLK_4"


17)			ADD to U62	3 new inputs from "DOUT1"
					3 new outputs "CLK_54", "CLK_56",
						"LEDCLK_5"

18)	 Diag. -	ADD new spare DIL pads :	U77 - U83
				

19)	Diag. 200B	CHANGE U.102 / PLD-2 pin 37 from a(0) to da(0)
					     pin 38 from a(1) to da(1)


20)	Diag. 400B	CHANGE U.104 / PLD-4 pin 21 from a(0) to da(0)
					     pin 22 from a(1) to da(1)

									/cont:





21)	Diag. 200B	CHANGE U.102 / PLD-2 signals on pins 163 - 169 as shown


22)	Diag. 400B	CHANGE U.104 / PLD-4 pin 107 from "v-error" to "verror"


23)			REMOVE U.104 / PLD-4 signal "m_error" from pin 97


24)			ADD to U.104/ PLD-4 new signals on
					pins 202 - 207 : "cctdl(0)" - "cctdl(5)"














					This version, MP-UCL :	09 Jun.	1999


					Previous versions :	08 Jun. 1999