#### START OF AREA REPORT #####[
Part: XC3S400AFT256-4 (Xilinx)
Click here to go to specific block report:
startup_fpga
debounce
debounce_1
dcm_block
dcm_block_1
dcm_block_2
dcm_block_3
onewire_iface
clk_divider
onewire_master
SHRegZ1
SHRegZ0
JCounterZ1
JCounterZ0
BitReg
ByteReg
CRCReg
lda_spi_master
lda_spi_core_master
----------------------------------------------------------------------------
######## Utilization report for Top level view: startup_fpga ########
============================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 250 100 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga: 250 (41.74 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 167 100 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 5 100 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga: 172 (28.71 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 70 100 %
=================================================
Total IO PADS in the block startup_fpga: 70 (11.69 % Utilization)
Top
---------------------------------------------------------------
######## Utilization report for cell: dcm_block ########
Instance path: startup_fpga.dcm_block
===============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 6 2.4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.dcm_block: 6 (1.00 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 2 1.2 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.dcm_block: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.dcm_block: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.dcm_block: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.dcm_block: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.dcm_block: 0 (0.00 % Utilization)
Top
-----------------------------------------------------------------
######## Utilization report for cell: dcm_block_1 ########
Instance path: startup_fpga.dcm_block_1
=================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 6 2.4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.dcm_block_1: 6 (1.00 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 2 1.2 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.dcm_block_1: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.dcm_block_1: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.dcm_block_1: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.dcm_block_1: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.dcm_block_1: 0 (0.00 % Utilization)
Top
-----------------------------------------------------------------
######## Utilization report for cell: dcm_block_2 ########
Instance path: startup_fpga.dcm_block_2
=================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 6 2.4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.dcm_block_2: 6 (1.00 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 2 1.2 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.dcm_block_2: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.dcm_block_2: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.dcm_block_2: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.dcm_block_2: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.dcm_block_2: 0 (0.00 % Utilization)
Top
-----------------------------------------------------------------
######## Utilization report for cell: dcm_block_3 ########
Instance path: startup_fpga.dcm_block_3
=================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 6 2.4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.dcm_block_3: 6 (1.00 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 2 1.2 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.dcm_block_3: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.dcm_block_3: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.dcm_block_3: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.dcm_block_3: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.dcm_block_3: 0 (0.00 % Utilization)
Top
--------------------------------------------------------------
######## Utilization report for cell: debounce ########
Instance path: startup_fpga.debounce
==============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 10 4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.debounce: 10 (1.67 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 7 4.19 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 1 20 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.debounce: 8 (1.34 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.debounce: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.debounce: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.debounce: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.debounce: 0 (0.00 % Utilization)
Top
----------------------------------------------------------------
######## Utilization report for cell: debounce_1 ########
Instance path: startup_fpga.debounce_1
================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 10 4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.debounce_1: 10 (1.67 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 8 4.79 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 1 20 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.debounce_1: 9 (1.50 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.debounce_1: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.debounce_1: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.debounce_1: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.debounce_1: 0 (0.00 % Utilization)
Top
--------------------------------------------------------------------
######## Utilization report for cell: lda_spi_master ########
Instance path: startup_fpga.lda_spi_master
====================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 43 17.2 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.lda_spi_master: 43 (7.18 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 67 40.1 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 1 20 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.lda_spi_master: 68 (11.35 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.lda_spi_master: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.lda_spi_master: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.lda_spi_master: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block startup_fpga.lda_spi_master: 0 (0.00 % Utilization)
Top
-------------------------------------------------------------------------
######## Utilization report for cell: lda_spi_core_master ########
Instance path: lda_spi_master.lda_spi_core_master
=========================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 17 6.8 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block lda_spi_master.lda_spi_core_master: 17 (2.84 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 19 11.4 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block lda_spi_master.lda_spi_core_master: 19 (3.17 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block lda_spi_master.lda_spi_core_master: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block lda_spi_master.lda_spi_core_master: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block lda_spi_master.lda_spi_core_master: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block lda_spi_master.lda_spi_core_master: 0 (0.00 % Utilization)
Top
-------------------------------------------------------------------
######## Utilization report for cell: onewire_iface ########
Instance path: startup_fpga.onewire_iface
===================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 101 40.4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block startup_fpga.onewire_iface: 101 (16.86 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 59 35.3 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 2 40 %
=================================================================
Total COMBINATIONAL LOGIC in the block startup_fpga.onewire_iface: 61 (10.18 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block startup_fpga.onewire_iface: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block startup_fpga.onewire_iface: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block startup_fpga.onewire_iface: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 1 1.43 %
=================================================
Total IO PADS in the block startup_fpga.onewire_iface: 1 (0.17 % Utilization)
Top
-----------------------------------------------------------------
######## Utilization report for cell: clk_divider ########
Instance path: onewire_iface.clk_divider
=================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 1 0.40 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_iface.clk_divider: 1 (0.17 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 0 0 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 2 40 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_iface.clk_divider: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_iface.clk_divider: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_iface.clk_divider: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_iface.clk_divider: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_iface.clk_divider: 0 (0.00 % Utilization)
Top
--------------------------------------------------------------------
######## Utilization report for cell: onewire_master ########
Instance path: onewire_iface.onewire_master
====================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 100 40 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_iface.onewire_master: 100 (16.69 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 59 35.3 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_iface.onewire_master: 59 (9.85 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_iface.onewire_master: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_iface.onewire_master: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_iface.onewire_master: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 1 1.43 %
=================================================
Total IO PADS in the block onewire_iface.onewire_master: 1 (0.17 % Utilization)
Top
------------------------------------------------------------
######## Utilization report for cell: BitReg ########
Instance path: onewire_master.BitReg
============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 8 3.2 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.BitReg: 8 (1.34 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 0 0 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.BitReg: 0 (0.00 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.BitReg: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.BitReg: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.BitReg: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.BitReg: 0 (0.00 % Utilization)
Top
-------------------------------------------------------------
######## Utilization report for cell: ByteReg ########
Instance path: onewire_master.ByteReg
=============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 48 19.2 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.ByteReg: 48 (8.01 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 6 3.59 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.ByteReg: 6 (1.00 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.ByteReg: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.ByteReg: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.ByteReg: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.ByteReg: 0 (0.00 % Utilization)
Top
------------------------------------------------------------
######## Utilization report for cell: CRCReg ########
Instance path: onewire_master.CRCReg
============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 8 3.2 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.CRCReg: 8 (1.34 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 3 1.8 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.CRCReg: 3 (0.50 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.CRCReg: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.CRCReg: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.CRCReg: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.CRCReg: 0 (0.00 % Utilization)
Top
----------------------------------------------------------------
######## Utilization report for cell: JCounterZ0 ########
Instance path: onewire_master.JCounterZ0
================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 10 4 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.JCounterZ0: 10 (1.67 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 2 1.2 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.JCounterZ0: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.JCounterZ0: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.JCounterZ0: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.JCounterZ0: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.JCounterZ0: 0 (0.00 % Utilization)
Top
----------------------------------------------------------------
######## Utilization report for cell: JCounterZ1 ########
Instance path: onewire_master.JCounterZ1
================================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 2 0.80 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.JCounterZ1: 2 (0.33 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 1 0.5990 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.JCounterZ1: 1 (0.17 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.JCounterZ1: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.JCounterZ1: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.JCounterZ1: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.JCounterZ1: 0 (0.00 % Utilization)
Top
-------------------------------------------------------------
######## Utilization report for cell: SHRegZ0 ########
Instance path: onewire_master.SHRegZ0
=============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 8 3.2 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.SHRegZ0: 8 (1.34 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 1 0.5990 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.SHRegZ0: 1 (0.17 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.SHRegZ0: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.SHRegZ0: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.SHRegZ0: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.SHRegZ0: 0 (0.00 % Utilization)
Top
-------------------------------------------------------------
######## Utilization report for cell: SHRegZ1 ########
Instance path: onewire_master.SHRegZ1
=============================================================
SEQUENTIAL ELEMENTS
*******************
Name Total elements Utilization Notes
------------------------------------------------------
REGISTERS 8 3.2 %
LATCHES 0 0 %
======================================================
Total SEQUENTIAL ELEMENTS in the block onewire_master.SHRegZ1: 8 (1.34 % Utilization)
Top
COMBINATIONAL LOGIC
*******************
Name Total elements Utilization Notes
-----------------------------------------------------------------
LUTS 2 1.2 %
MUXCY 0 0 %
XORCY 0 0 %
MULT18x18/MULT18x18S 0 0 %
SRL16 0 0 %
=================================================================
Total COMBINATIONAL LOGIC in the block onewire_master.SHRegZ1: 2 (0.33 % Utilization)
Top
MEMORY ELEMENTS
***************
Name Total elements Utilization Notes
------------------------------------------------------
SYNC RAMS 0 0 %
======================================================
Total MEMORY ELEMENTS in the block onewire_master.SHRegZ1: 0 (0.00 % Utilization)
Top
Name Total elements Number of bits Utilization Notes
--------------------------------------------------------------------
ROMS 0 0 0 %
====================================================================
Total in the block onewire_master.SHRegZ1: 0 (0.00 % Utilization)
Top
Distributed RAM
***************
Name Total elements Number of LUTs Utilization Notes
-------------------------------------------------------------------------------
DISTRIBUTED RAM 0 0 0 %
===============================================================================
Total Distributed RAM in the block onewire_master.SHRegZ1: 0 (0.00 % Utilization)
Top
IO PADS
*******
Name Total elements Utilization Notes
-------------------------------------------------
PADS 0 0 %
=================================================
Total IO PADS in the block onewire_master.SHRegZ1: 0 (0.00 % Utilization)
Top
##### END OF AREA REPORT #####]