| hdmi Project Status (03/16/2010 - 15:50:45) | |||
| Project File: | hdmi.ise | Implementation State: | Synthesized (Stopped) |
| Module Name: | hdmi_module_top_level |
|
|
| Target Device: | xc3s1500-4fg456 |
|
|
| Product Version: | ISE 11.4 |
|
|
| Design Goal: | Balanced |
|
|
| Design Strategy: | Xilinx Default (unlocked) |
|
|
| Detailed Reports | [-] | |||||
| Report Name | Status | Generated | Errors | Warnings | Infos | |
| Synthesis Report | Current | Tue Mar 16 15:50:45 2010 | ||||
| Translation Report | Out of Date | Tue Mar 16 15:48:18 2010 | 0 | 0 | 0 | |
| Map Report | Out of Date | Tue Mar 16 15:48:23 2010 | 0 | 69 Warnings | 2 Infos | |
| Place and Route Report | Out of Date | Tue Mar 16 15:48:31 2010 | 0 | 71 Warnings | 2 Infos | |
| Power Report | ||||||
| Post-PAR Static Timing Report | Out of Date | Tue Mar 16 15:48:33 2010 | 0 | 2 Warnings | 2 Infos | |
| Bitgen Report | Out of Date | Tue Mar 16 15:48:40 2010 | 0 | 67 Warnings | 1 Info | |
| Secondary Reports | [-] | ||
| Report Name | Status | Generated | |