md2 Project Status (01/12/2010 - 15:47:57)
Project File: md2.ise Implementation State: Programming File Generated
Module Name: md2
  • Errors:
No Errors
Target Device: xc3s2000-5fg456
  • Warnings:
14293 Warnings (0 new)
Product Version:ISE 11.4
  • Routing Results:
All Signals Completely Routed
Design Goal: Timing Performance
  • Timing Constraints:
X 1 Failing Constraint
Design Strategy: Performance with Physical Synthesis
  • Final Timing Score:
74 (Setup: 74, Hold: 0, Component Switching Limit: 0) (Timing Report)
 
Device Utilization Summary [-]
Logic UtilizationUsedAvailableUtilizationNote(s)
Total Number Slice Registers 12,502 40,960 30%  
    Number used as Flip Flops 12,501      
    Number used as Latches 1      
Number of 4 input LUTs 17,988 40,960 43%  
Number of occupied Slices 12,587 20,480 61%  
    Number of Slices containing only related logic 12,587 12,587 100%  
    Number of Slices containing unrelated logic 0 12,587 0%  
Total Number of 4 input LUTs 18,514 40,960 45%  
    Number used as logic 17,355      
    Number used as a route-thru 526      
    Number used for Dual Port RAMs 232      
    Number used as Shift registers 401      
Number of bonded IOBs 82 333 24%  
    IOB Flip Flops 47      
Number of RAMB16s 27 40 67%  
Number of BUFGMUXs 6 8 75%  
Number of DCMs 2 4 50%  
Number of RPM macros 8      
Average Fanout of Non-Clock Nets 4.10      
 
Performance Summary [-]
Final Timing Score: 74 (Setup: 74, Hold: 0, Component Switching Limit: 0) Pinout Data: Pinout Report
Routing Results: All Signals Completely Routed Clock Data: Clock Report
Timing Constraints: X 1 Failing Constraint    
 
Detailed Reports [-]
Report NameStatusGenerated ErrorsWarningsInfos
Synthesis ReportCurrentTue Jan 12 15:30:31 201001551 Warnings (0 new)331 Infos (0 new)
Translation ReportCurrentTue Jan 12 15:30:57 2010007 Infos (0 new)
Map ReportCurrentTue Jan 12 15:37:09 2010012716 Warnings (0 new)5 Infos (0 new)
Place and Route ReportCurrentTue Jan 12 15:47:25 201001 Warning (0 new)5 Infos (0 new)
Power Report     
Post-PAR Static Timing ReportCurrentTue Jan 12 15:47:56 2010003 Infos (0 new)
Bitgen ReportCurrentTue Jan 12 15:48:27 2010025 Warnings (0 new)1 Info (0 new)
 
Secondary Reports [-]
Report NameStatusGenerated
Physical Synthesis ReportCurrentTue Jan 12 15:37:09 2010

Date Generated: 01/12/2010 - 17:08:58