Generation Settings
Component declarations | yes |
Configurations | in separate file |
add pragmas |
exclude view name |
Declarations
Ports:
rst_btn_ni : std_logic
ext_por_no : std_logic
strobe40_o : std_logic
clk40_o : std_logic
rst_no : std_logic
ext_bco_i : std_logic
clk_ext_sel_i : std_logic
--#clockpinforAtlysrevCboard
clk100_i : std_logic
clk125_locked_o : std_logic
clk125_o : std_logic
iserdes_clk_o : std_ulogic
iserdes_strb_o : std_logic
clk80_o : std_logic
clks_locked_o : std_logic
s20_o : std_logic
tog20_o : std_logic
rst1_o : std_logic
rst2_o : std_logic
rst3_o : std_logic
rst125_o : std_ulogic
is_strb_tdc_o : std_logic
is_clk_tdc_o : std_logic
rst_top_o : std_logic
rst_top_125_o : std_ulogic
Diagram Signals:
signal rst : std_logic
signal clk40 : std_logic
signal ext_por : std_logic
signal clk160 : std_logic
signal clks_locked : std_logic
signal clk80 : std_logic
signal clk40a : std_logic
signal clk80a : std_logic
signal clk160a : std_logic
signal clkn40a : std_logic
signal clk40b : std_logic
signal clk80b : std_logic
signal clk160b : std_logic
signal clk125 : std_logic
signal pll12540_locked : std_logic
signal pll_locked : std_logic
signal pll_rst : std_logic
signal clk40i_nobufg : std_logic
signal clk320_nobufg : std_logic
signal clk40i : std_logic
signal pll640_locked : std_logic
signal clk640_nobufg : std_logic
signal clks_lckd_tdc_o : std_logic
Pre User:
Post User:
Package List
library IEEE;
use IEEE.STD_LOGIC_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library utils;
use utils.pkg_types.all;
library unisim;
use unisim.VCOMPONENTS.all;
use ieee.numeric_std.all;
Bundles