Generation Settings

Declarations

Ports:

clk             : std_logic
-- hsio oc bus
oc_data_i       : std_logic_vector(15 DOWNTO 0)
oc_valid_i      : std_logic
s40             : std_logic
rst_ocb_i       : std_logic
spiser_clk_o    : std_logic
-- payload output
spiser_com_o    : std_logic
rst             : std_logic
c_lls           : t_llsrc_array(15 DOWNTO 0)
tick_i          : std_logic_vector(MAX_TICTOG DOWNTO 0)
ti2c_cvst_no    : std_logic_vector(2 DOWNTO 0)
ti2c_cvstt_no   : std_logic_vector(2 DOWNTO 0)
sck_o           : slv16
sck_to          : slv16
sda_o           : slv16
sda_to          : slv16
sda_i           : slv16
c_lld           : std_logic_vector(15 DOWNTO 0)
-- payload output
command_o       : std_logic_vector(15 DOWNTO 0)
rst_trig_o      : std_logic
rst_ro_o        : std_logic
rst_feo_o       : std_logic
rst_disp_o      : std_logic
rst_netrx_o     : std_logic
rst_nettx_o     : std_logic
-- status words in
stat_i          : slv16_array(31 downto 0)
com_ocrawcom_o  : std_logic
-- registers
reg_o           : t_reg_bus
db_data_o       : std_logic_vector(15 downto 0)
db_wr_o         : std_logic_vector(31 downto 0)
strm_reg_o      : slv16_array(143 DOWNTO 0)
-- streams interface
strm_req_stat_o : std_logic_vector(143 DOWNTO 0)
strm_cmd_o      : slv16_array(143 DOWNTO 0)
rawsigs_o       : std_logic_vector(15 downto 0)
trg_all_mask_i  : std_logic_vector(15 downto 0)
ocraw_start_o   : std_logic
sq_addr_o       : std_logic_vector(15 downto 0)
sq_stat_o       : std_logic_vector(7 downto 0)
tog20_i         : std_logic
oc_dack_no      : std_logic

Diagram Signals:

signal HI              : std_logic
-- payload output
signal command         : std_logic_vector(15 DOWNTO 0)
-- registers
signal reg             : t_reg_bus
signal com_ocrawcom    : std_logic
signal ocrawcom_start  : std_logic
signal ocrawsigs_start : std_logic
signal seqsigs         : std_logic_vector(15 downto 0)
signal rawsigs         : std_logic_vector(15 downto 0)
signal ocseqsigs_start : std_logic
signal db_data         : std_logic_vector(15 downto 0)
signal db_wr           : std_logic_vector(31 downto 0)
signal scan_en_q       : std_logic_vector(2 downto 0)
signal scan_start      : std_logic
signal scan_en_d       : std_logic
signal reg_sigs_idle   : std_logic_vector(15 DOWNTO 0)
signal sigs_and        : std_logic_vector(15 downto 0)
signal sigs_or         : std_logic_vector(15 downto 0)
signal seq_running     : std_logic
signal sigs_running    : std_logic
signal raws_running_o  : std_logic
-- payload functions
signal sink_sigs_i     : std_logic_vector(15 downto 0)

Pre User:

Post User:

Package List

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
library utils;
use utils.pkg_types.all;

library hsio;
use hsio.pkg_core_globals.all;

use ieee.numeric_std.all;
--library vga;
--use vga.pkg_vga.all;

Bundles