Generation Settings
| Component declarations | yes |
| Configurations | in separate file |
| add pragmas |
| exclude view name |
Declarations
Ports:
-- DISPLAY
disp_clk_o : std_logic --DISP_CLK
disp_dat_o : std_logic --DISP_DAT
disp_rst_no : std_logic --DISP_RST_N
idc_p3_io : std_logic_vector(31 downto 0) --IDC_P3
idc_p4_io : std_logic_vector(31 downto 0) --IDC_P4
idc_p5_io : std_logic_vector(31 downto 0) --IDC_P5
led_status_o : std_logic --LED_FPGA_STATUS
disp_load_no : std_logic_vector(1 downto 0) --DISP_LOAD1_N
db_wr : std_logic_vector(31 DOWNTO 0)
sw_hex_ni : std_logic_vector(3 downto 0)
clk : std_logic
spiser_clk_o : std_logic
-- payload output
spiser_com_o : std_logic
clk40 : std_logic
sf_stat_word_i : slv64_array(1 DOWNTO 0)
sf_mac_stat_i : slv64_array(1 DOWNTO 0)
sf_syncacq_i : std_logic_vector(1 DOWNTO 0)
-- Client Receiver Interface - EMAC0
rx_ok_i : std_logic
tx_ok_i : std_logic
stat_word_cu : std_logic_vector(63 DOWNTO 0)
stat_word_usb : std_logic_vector(63 downto 0)
-- registers
reg : t_reg_bus
ti2c_cvst_no : std_logic_vector(2 DOWNTO 0)
ti2c_cvstt_no : std_logic_vector(2 DOWNTO 0)
sck_o : slv16
sck_to : slv16
sda_o : slv16
sda_to : slv16
sda_i : slv16
tx_lls_o : t_llsrc
tx_lld_i : std_logic
sma_io : std_logic_vector(8 downto 1) --IDC_P5
rawsigs_o : std_logic_vector(15 downto 0)
com_abc_o : std_logic
strobe40_i : std_logic
sim_dat_lvds_o : std_logic_vector(31 downto 0)
outsigs_o : std_logic_vector(15 downto 0)
dbg_outsigs_i : std_logic_vector(15 downto 0)
clk_ext_on_i : std_logic
rst_in : std_logic
link_idly_i : std_logic_vector(67 downto 0)
dbg_count_o : std_logic_vector(7 downto 0)
clocky_leds_o : std_logic_vector(7 DOWNTO 0)
lemo_clk_o : std_logic
clk_p2_pll_i : std_logic
stat_clks_top_i : std_logic_vector(7 downto 0)
tlu_tclk : std_logic
tlu_busy : std_logic
clk160ps : std_logic
clk160 : std_logic
stat_clks_main_i : std_logic_vector(3 downto 0)
tog20_i : std_logic
s20_i : std_logic
tlu_reset : std_logic
strm_reg_o : slv16_array(143 DOWNTO 0)
-- In
link4x_i : slv4_array(67 downto 0)
tdc_counter1_i : std_logic_vector(31 downto 0)
tdc_counter2_i : std_logic_vector(31 downto 0)
command_o : std_logic_vector(15 downto 0)
oc_dack_no : std_logic
-- hsio oc bus
oc_data_i : std_logic_vector(15 DOWNTO 0)
oc_valid_i : std_logic
rst_ocb_i : std_logic
dbg_oc_start_i : std_logic
tlu_ptrig_i : std_logic_vector(7 downto 0)
ptrig_ext0_i : std_logic_vector(7 downto 0)
Diagram Signals:
signal LO : std_logic
signal HI : std_logic
signal dispDigitA : std_logic_vector(7 downto 0)
signal dispDigitB : std_logic_vector(7 downto 0)
signal dispDigitC : std_logic_vector(7 downto 0)
signal dispDigitD : std_logic_vector(7 downto 0)
signal dispDigitE : std_logic_vector(7 downto 0)
signal dispDigitF : std_logic_vector(7 downto 0)
signal dispDigitG : std_logic_vector(7 downto 0)
signal dispDigitH : std_logic_vector(7 downto 0)
signal dispword : std_logic_vector(31 DOWNTO 0)
signal trig80 : std_logic
signal db_data : std_logic_vector(15 DOWNTO 0)
signal com_ocrawcom : std_logic
signal led_trig : std_logic
signal l1id : slv24
signal bcid : std_logic_vector(11 DOWNTO 0)
signal HSIO_VER : std_logic_vector(31 downto 0)
signal bcid_l1a : std_logic_vector(11 DOWNTO 0)
signal ocraw_start : std_logic
signal strobe40 : std_logic
signal rst : std_logic
signal binmapchar : std_logic_vector(7 downto 0)
signal led_rx : std_logic
signal led_tx : std_logic
signal post_rst_5s : std_logic
signal strm_reg : slv16_array(143 DOWNTO 0)
-- streams interface
signal strm_req_stat : std_logic_vector(143 DOWNTO 0)
signal strm_cmd : slv16_array(143 DOWNTO 0)
-- status words in
signal stat : slv16_array(31 downto 0)
signal command : std_logic_vector(15 downto 0)
signal tb_bcount : std_logic_vector(15 downto 0)
signal tb_tcount : std_logic_vector(15 downto 0)
signal rst_ro : std_logic
signal rst_trig : std_logic
signal rst_disp : std_logic
signal trig40 : std_logic
signal lemo_trig : std_logic
signal dbg_oe : std_logic
signal dbg_strm : std_logic_vector(135 DOWNTO 0)
signal idbg_link_sel : integer RANGE 0 TO 255
--ht_delta_max_i : in slv6;
signal busy_ro : std_logic
signal pattern_go : std_logic
signal tick : std_logic_vector(34 downto 0)
signal rst_netrx : std_logic
signal rst_nettx : std_logic
signal s_lld : std_logic_vector(255 DOWNTO 0)
signal s_lls : t_llsrc_array(255 DOWNTO 0)
signal build_no_slv : std_logic_vector(15 DOWNTO 0)
signal epoc_secs : std_logic_vector(31 downto 0)
signal rawsigs : std_logic_vector(15 downto 0)
signal twin_open : std_logic
signal sim_count : std_logic_vector(7 downto 0)
signal sim_dat : std_logic_vector(15 DOWNTO 0)
signal com_abc : std_logic
signal l1r_abc : std_logic
signal dbg_trig_ext : std_logic
signal SPY_STREAM_ID : integer
signal trg_all_mask : std_logic_vector(15 downto 0)
signal spy_hold_reg : std_logic_vector(15 downto 0)
signal busy_ext : std_logic
signal busy_all : std_logic
signal sq_addr : std_logic_vector(15 downto 0)
signal sq_stat : std_logic_vector(7 downto 0)
signal tb_flags : std_logic_vector(7 DOWNTO 0)
signal strm_i : std_logic_vector(135 DOWNTO 0)
signal dbg_lemo_link : std_logic
signal dbg_clk : std_logic
signal dbg_com_abc : std_logic
signal dbg_l1r_abc : std_logic
signal dbg_lemo_trig : std_logic
-- registers
signal dbg_reg : t_reg_bus
signal dbg_l1id : slv24
signal dbg_bcid_l1a : std_logic_vector(11 DOWNTO 0)
signal dbg_strobe40 : std_logic
signal dbg_trig80 : std_logic
signal dbg_twin_open : std_logic
signal dbg_busy_ro : std_logic
signal dbg_ocraw_start : std_logic
signal dbg_lemo_strm0 : std_logic
signal dbg_lemo_strm1 : std_logic
signal dbg_clk40 : std_logic
signal dbg_link_idly : std_logic_vector(67 downto 0)
signal led_ocraw_start : std_logic
signal dbg_busy_ext : std_logic
signal lemo_clk : std_logic
signal tog_pll : std_logic_vector(MAX_TICTOG downto 0)
signal trig_out : std_logic
signal dbg_trig_out : std_logic
signal l0id : std_logic_vector(31 downto 0)
signal l0id_l1 : std_logic_vector(7 downto 0)
signal pretrig_out : std_logic
signal strobe40_n : std_logic
signal lemo_bco_out : std_logic
signal stat_clks_main : std_logic_vector(3 downto 0)
signal dbg_clk_p2_pll : std_logic
signal dbg_lemo_clk : std_logic
signal lemo_clk_in : std_logic
signal dbg_clk156 : std_logic
signal dbg_clk156_delayed : std_logic
signal tdc_calib_edge0 : std_logic
signal dbg_tdc_calib_edge0 : std_logic
signal tlu_trig : std_logic
signal tog : std_logic_vector(34 downto 0)
signal dbg_tlu_trig : std_logic
signal dbg_tlu_tclk : std_logic
signal dbg_tlu_busy : std_logic
signal led_tlu_trig : std_logic
signal led_tlu_busy : std_logic
signal led_tlu_tclk : std_logic
signal dbg_clk160ps : std_logic
signal dbg_clk160 : std_logic
signal twin_swap : std_logic
signal twin_clk40 : std_logic
signal twin_clk80 : std_logic
signal clkn80_delayed : std_logic
signal clk40_delayed : std_logic
signal clkn40_delayed : std_logic
signal clk80_delayed : std_logic
signal post_rst_5s_n : std_logic
signal MODULECOUNT : integer
signal dbg_tlu_reset : std_logic
signal tdc_data_i : std_logic_vector(39 downto 0)
Pre User:
Post User:
attribute KEEP : string;
attribute KEEP of dispword : signal is "true";
attribute KEEP of dbg_oe : signal is "true";
--attribute KEEP of sma_io : signal is "true";
--attribute KEEP of idc_p2_io : signal is "true";
--attribute KEEP of idc_p3_io : signal is "true";
--attribute KEEP of idc_p4_io : signal is "true";
--attribute KEEP of idc_p5_io : signal is "true";
-- Note sure if keeping both helps,
-- but I doubt it hinders
--attribute KEEP of clk40 : signal is "true";
--attribute KEEP of dbg_clk40_delayed : signal is "true";
--attribute KEEP of dbg_clk40 : signal is "true";
--attribute KEEP of clk156 : signal is "true";
--attribute KEEP of dbg_clk156 : signal is "true";
--attribute KEEP of dbg_clk156_delayed : signal is "true";
--attribute KEEP of clk : signal is "true";
--attribute KEEP of dbg_clk : signal is "true";
attribute KEEP of strm_i : signal is "true";
attribute KEEP of dbg_strm : signal is "true";
attribute KEEP of reg : signal is "true";
attribute KEEP of dbg_reg : signal is "true";
attribute KEEP of link_idly_i : signal is "true";
attribute KEEP of dbg_link_idly : signal is "true";
attribute KEEP of dbg_tdc_calib_edge0 : signal is "true";
--attribute KEEP of dbg_tdc_calib_edge1 : signal is "true";
attribute KEEP of twin_open : signal is "true";
attribute KEEP of twin_clk40 : signal is "true";
attribute KEEP of twin_clk80 : signal is "true";
Package List
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;
use ieee.numeric_std.all;
library UNISIM;
use UNISIM.Vcomponents.all;
library hsio;
use hsio.pkg_core_globals.all;
library utils;
use utils.pkg_types.all;
Bundles