{
    "ltx_root": {
        "version": 4,
        "minor": 0,
        "ltx_data": [
            {
                "name": "EDA_PROBESET",
                "active": true,
                "debug_cores": [
                    {
                        "type": "XSDB_V3",
                        "name": "dbg_hub",
                        "spec": "labtools_xsdbm_v3",
                        "clk_input_freq_hz": "79999999"
                    },
                    {
                        "type": "ILA_V3",
                        "name": "u_ila_0",
                        "spec": "labtools_ila_v6",
                        "core_location": {
                            "user_chain": 1,
                            "slave_index": 0,
                            "bscan_switch_index": 0
                        },
                        "uuid": "23e7d65a79bc59f7bc47406c1714dfae",
                        "pins": [
                            {
                                "name": "probe0",
                                "id": 0,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 1,
                                "portIndex": 0,
                                "nets": [
                                    {
                                        "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/dnlink_icec_i",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/dnlink_icec_i[1]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/dnlink_icec_i[0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe1",
                                "id": 1,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 3,
                                "portIndex": 1,
                                "nets": [
                                    {
                                        "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/uplink_icec_data_o",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/uplink_icec_data_o[3]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/uplink_icec_data_o[2]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/uplink_icec_data_o[1]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/uplink_icec_data_o[0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe2",
                                "id": 2,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 3,
                                "portIndex": 2,
                                "nets": [
                                    {
                                        "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/uplink_icec_o",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/uplink_icec_o[3]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/uplink_icec_o[2]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/uplink_icec_o[1]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/uplink_icec_o[0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe3",
                                "id": 3,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 1,
                                "portIndex": 3,
                                "nets": [
                                    {
                                        "name": "g_gbts_build.Udiogrpgbt/gbt_tx_ic_o[1]",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_tx_ic_o[1][1]"
                                            },
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_tx_ic_o[1][0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe4",
                                "id": 4,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 1,
                                "portIndex": 4,
                                "nets": [
                                    {
                                        "name": "g_gbts_build.Udiogrpgbt/gbt_rx_ic_i[0]",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_rx_ic_i[0][1]"
                                            },
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_rx_ic_i[0][0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe5",
                                "id": 5,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 1,
                                "portIndex": 5,
                                "nets": [
                                    {
                                        "name": "g_gbts_build.Udiogrpgbt/gbt_tx_ic_o[0]",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_tx_ic_o[0][1]"
                                            },
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_tx_ic_o[0][0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe6",
                                "id": 6,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 1,
                                "portIndex": 6,
                                "nets": [
                                    {
                                        "name": "g_gbts_build.Udiogrpgbt/gbt_rx_ic_i[1]",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_rx_ic_i[1][1]"
                                            },
                                            {
                                                "name": "g_gbts_build.Udiogrpgbt/gbt_rx_ic_i[1][0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe7",
                                "id": 7,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": true,
                                "leftIndex": 0,
                                "rightIndex": 1,
                                "portIndex": 7,
                                "nets": [
                                    {
                                        "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/dnlink_icec_data_i",
                                        "isBus": true,
                                        "subnets": [
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/dnlink_icec_data_i[1]"
                                            },
                                            {
                                                "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/Upathlpgbtfpgaits0/lpgbt_fpga_inst/dnlink_icec_data_i[0]"
                                            }
                                        ]
                                    }
                                ]
                            },
                            {
                                "name": "probe8",
                                "id": 8,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": false,
                                "leftIndex": 0,
                                "rightIndex": 0,
                                "portIndex": 8,
                                "nets": [
                                    {
                                        "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/lgf_dnlink_ready_o",
                                        "isBus": false
                                    }
                                ]
                            },
                            {
                                "name": "probe9",
                                "id": 9,
                                "type": "DATA_TRIGGER",
                                "direction": "IN",
                                "isVector": false,
                                "leftIndex": 0,
                                "rightIndex": 0,
                                "portIndex": 9,
                                "nets": [
                                    {
                                        "name": "g_lpgbt.g_dio_lpgbt.Ulpgbt2fpga2model/lgf_uplink_ready_o",
                                        "isBus": false
                                    }
                                ]
                            }
                        ]
                    }
                ]
            }
        ]
    }
}