diff --git a/Sources/Payload/GCI/hdl/ctp_out.vhd b/Sources/Payload/GCI/hdl/ctp_out.vhd
index e2e0c3297..feabca3e4 100644
--- a/Sources/Payload/GCI/hdl/ctp_out.vhd
+++ b/Sources/Payload/GCI/hdl/ctp_out.vhd
@@ -297,8 +297,8 @@ begin
         m_tdata            => open,     --m_tdata_chan(i),
         m_tvalid           => open,     --m_tvalid_chan(i),
         m_tlast            => open,     --m_tlast_chan(i),
-        out_32b_o            => dout_32b_skewed(i),
-        charisk_o            => charisk_skewed(i),
+        out_32b_o          => dout_32b_skewed(i),
+        charisk_o          => charisk_skewed(i),
         word_sel_o         => word_sels(i)
         );
 
@@ -380,34 +380,34 @@ begin
 
 
 
---U_ila : axis_ila_ctpout
---  PORT MAP (
---    clk => tx_clk,
---    probe0 => dout_32b_o(0),
---    probe1 => dout_32b_o(1),
---    probe2 => dout_32b_o(2),
---    probe3 => dout_32b_o(3),
---    probe4 => dout_32b_o(4),
---    probe5 => dout_32b_o(5),
---    probe6 => dout_32b_o(6),
---    probe7 => dout_32b_o(7),
---    probe8 =>  charisk_o(0),
---    probe9 =>  charisk_o(1),
---    probe10 => charisk_o(2),
---    probe11 => charisk_o(3),
---    probe12 => charisk_o(4),
---    probe13 => charisk_o(5),
---    probe14 => charisk_o(6),
---    probe15 => charisk_o(7),
---    probe16 => word_sels(0),
---    probe17 => word_sels(1),
---    probe18 => word_sels(2),
---    probe19 => word_sels(3),
---    probe20 => word_sels(4),
---    probe21 => word_sels(5),
---    probe22 => word_sels(6),
---    probe23 => word_sels(7)
---  );
+U_ila : axis_ila_ctpout
+  PORT MAP (
+    clk => tx_clk,
+    probe0 => dout_32b_o(0),
+    probe1 => dout_32b_o(1),
+    probe2 => dout_32b_o(2),
+    probe3 => dout_32b_o(3),
+    probe4 => dout_32b_o(4),
+    probe5 => dout_32b_o(5),
+    probe6 => dout_32b_o(6),
+    probe7 => dout_32b_o(7),
+    probe8 =>  charisk_o(0),
+    probe9 =>  charisk_o(1),
+    probe10 => charisk_o(2),
+    probe11 => charisk_o(3),
+    probe12 => charisk_o(4),
+    probe13 => charisk_o(5),
+    probe14 => charisk_o(6),
+    probe15 => charisk_o(7),
+    probe16 => word_sels(0),
+    probe17 => word_sels(1),
+    probe18 => word_sels(2),
+    probe19 => word_sels(3),
+    probe20 => word_sels(4),
+    probe21 => word_sels(5),
+    probe22 => word_sels(6),
+    probe23 => word_sels(7)
+  );
 
   
 end rtl;
diff --git a/Sources/Payload/GCI/tb/payload_gci_tb.vhd b/Sources/Payload/GCI/tb/payload_gci_tb.vhd
index fe256e180..54dc08f1d 100644
--- a/Sources/Payload/GCI/tb/payload_gci_tb.vhd
+++ b/Sources/Payload/GCI/tb/payload_gci_tb.vhd
@@ -50,7 +50,7 @@ end payload_gci_tb;
 
 architecture sim of payload_gci_tb is
 
-  constant NUM_CHANS : integer := 2;    --49; --36; --3654/99=36 --49;
+  constant NUM_CHANS : integer := 1;    --49; --36; --3654/99=36 --49;
 
   signal clk       : std_logic;
   signal rst       : std_logic;
