diff --git a/Sources/Infra/GCM/GCM415/xdc/gt_links_gcm415.xdc b/Sources/Infra/GCM/GCM415/xdc/gt_links_gcm415.xdc
index 6e1ffac1d..373d1f8a5 100644
--- a/Sources/Infra/GCM/GCM415/xdc/gt_links_gcm415.xdc
+++ b/Sources/Infra/GCM/GCM415/xdc/gt_links_gcm415.xdc
@@ -101,10 +101,11 @@ set_property PACKAGE_PIN BE44 [get_ports {ports_upstrm_i[refclk0_pi][11]}]
 create_clock -period 6.400    [get_ports {ports_upstrm_i[refclk0_pi][11]}]
 set_property PACKAGE_PIN BT55 [get_ports {ports_upstrm_i[gt_rx_pi][44]}]
 
+#TODOHACKKACJ HAK
 # B201  UpstrmID:10 Enabled  -------------------------------
-set_property PACKAGE_PIN BB46 [get_ports {ports_upstrm_i[refclk0_pi][10]}]
-create_clock -period 6.400    [get_ports {ports_upstrm_i[refclk0_pi][10]}]
-set_property PACKAGE_PIN BK55 [get_ports {ports_upstrm_i[gt_rx_pi][40]}]
+#set_property PACKAGE_PIN BB46 [get_ports {ports_upstrm_i[refclk0_pi][10]}]
+#create_clock -period 6.400    [get_ports {ports_upstrm_i[refclk0_pi][10]}]
+#set_property PACKAGE_PIN BK55 [get_ports {ports_upstrm_i[gt_rx_pi][40]}]
 
 # B205  UpstrmID:14  Disabled  -------------------------------
 set_property PACKAGE_PIN AN44 [get_ports {ports_upstrm_i[refclk0_pi][14]}]
@@ -188,12 +189,27 @@ set_property PACKAGE_PIN E9   [get_ports {ports_dnstrm_o[gt_tx_po][0]}]
 #     RXP0_106        AJ4,AJ3    AH2,AH1    AG4,AG3    AF2,AF1 
 #     TXP0_106        AJ9,AJ8    AH7,AH6    AG9,AG8    AF7,AF6 
 
-set_property PACKAGE_PIN AE13 [get_ports {i_rdo_ports_top[lti_refclk_p]}]     
+#set_property PACKAGE_PIN AE13 [get_ports {i_rdo_ports_top[lti_refclk_p]}]     
+#create_clock -period 4.158    [get_ports {i_rdo_ports_top[lti_refclk_p]}]
+#set_property PACKAGE_PIN AF2  [get_ports {i_rdo_ports_top[lti_gt_rx_p]}]
+#set_property PACKAGE_PIN AF7  [get_ports {o_rdo_ports_top[felix_gt_tx_p][3]}]
+#set_property PACKAGE_PIN AF11 [get_ports {i_rdo_ports_top[felix_refclk_p]}]
+#create_clock -period 6.400    [get_ports {i_rdo_ports_top[felix_refclk_p]}]
+
+###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO
+#Hacking in B201 for CTP loopback test - REMOVE!! TODO
+# B201  #10  GTYP        --- 0 ---  --- 1 ---  --- 2 ---  --- 3 ---
+#     REFCLKP0_201   BB46,BB47  BA44,BA45
+#     RXP0_201       BK55,BK56  BJ57,BJ58  BH55,BH56  BG57,BG58
+#     TXP0_201       BM54,BM55  BN52,BN53  BL52,BL53  BJ52,BJ53
+
+set_property PACKAGE_PIN BA44 [get_ports {i_rdo_ports_top[lti_refclk_p]}]     
 create_clock -period 4.158    [get_ports {i_rdo_ports_top[lti_refclk_p]}]
-set_property PACKAGE_PIN AF2  [get_ports {i_rdo_ports_top[lti_gt_rx_p]}]
-set_property PACKAGE_PIN AF7  [get_ports {o_rdo_ports_top[felix_gt_tx_p][3]}]
-set_property PACKAGE_PIN AF11 [get_ports {i_rdo_ports_top[felix_refclk_p]}]
+set_property PACKAGE_PIN BG57 [get_ports {i_rdo_ports_top[lti_gt_rx_p]}]
+set_property PACKAGE_PIN BJ52  [get_ports {o_rdo_ports_top[felix_gt_tx_p][3]}]
+set_property PACKAGE_PIN BB46 [get_ports {i_rdo_ports_top[felix_refclk_p]}]
 create_clock -period 6.400    [get_ports {i_rdo_ports_top[felix_refclk_p]}]
+###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO###TODO
 
 
 
diff --git a/versal_image b/versal_image
index c70e7bada..f767c40d2 160000
--- a/versal_image
+++ b/versal_image
@@ -1 +1 @@
-Subproject commit c70e7bada68351f9e4182f6fc3c969d3f4fdf44d
+Subproject commit f767c40d2515c442c538a6eb9127ab9af3d5360c
