diff --git a/Sources/Infra/GCM/GCM415/2024.2/ip/transceiver_versal_interlaken/transceiver_versal_interlaken.xci b/Sources/Infra/GCM/GCM415/2024.2/ip/transceiver_versal_interlaken/transceiver_versal_interlaken.xci
index 09588845b..b69a6cc26 100644
--- a/Sources/Infra/GCM/GCM415/2024.2/ip/transceiver_versal_interlaken/transceiver_versal_interlaken.xci
+++ b/Sources/Infra/GCM/GCM415/2024.2/ip/transceiver_versal_interlaken/transceiver_versal_interlaken.xci
@@ -25,7 +25,7 @@
         "QUAD3_NO_PROT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
         "QUAD4_NO_PROT": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
         "INTF0_PRESET": [ { "value": "None", "resolve_type": "user", "usage": "all" } ],
-        "INTF0_GT_DIRECTION": [ { "value": "DUPLEX", "resolve_type": "user", "usage": "all" } ],
+        "INTF0_GT_DIRECTION": [ { "value": "SIMPLEX_TX", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
         "INTF0_NO_OF_LANES": [ { "value": "4", "resolve_type": "user", "format": "long", "usage": "all" } ],
         "INTF1_PRESET": [ { "value": "None", "resolve_type": "user", "usage": "all" } ],
         "INTF2_PRESET": [ { "value": "None", "resolve_type": "user", "usage": "all" } ],
@@ -48,7 +48,7 @@
         "INTF5_NO_OF_LANES": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
         "INTF6_NO_OF_LANES": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
         "INTF7_NO_OF_LANES": [ { "value": "1", "resolve_type": "user", "format": "long", "usage": "all" } ],
-        "INTF0_GT_SETTINGS": [ { "value": "LR0_SETTINGS {RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_REFCLK_SOURCE R0 TX_DATA_ENCODING 8B10B TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PLL_TYPE RPLL TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1}", "value_src": "user", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
+        "INTF0_GT_SETTINGS": [ { "value": "LR0_SETTINGS {TX_BUFFER_MODE 1 TX_DATA_ENCODING 8B10B TX_LINE_RATE 9.61896 TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1}", "value_src": "user", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
         "INTF1_GT_SETTINGS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
         "INTF2_GT_SETTINGS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
         "INTF3_GT_SETTINGS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
@@ -57,11 +57,11 @@
         "INTF6_GT_SETTINGS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
         "INTF7_GT_SETTINGS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict:target_gt_settings" } ],
         "INTF0_GT_INTERNAL": [ { "value": [
-            "GT_TYPE GTYP GT_DIRECTION DUPLEX LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LE",
-            "N_SEQ 1 RX_CB_MASK_0_0 false RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC",
-            "_REPEAT_WAIT 0 RX_CC_VAL 00000000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF",
-            " RX_SSC_PPM 0 RX_TERMINATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS {NA NA} LR2_SETTINGS {NA NA} LR3_SETTINGS {NA NA} LR4_SETTINGS {NA NA} LR5_SETTINGS {NA NA} LR6_SETTINGS {NA NA} LR7_SETTINGS {NA NA} LR8_SE",
-            "TTINGS {NA NA} LR9_SETTINGS {NA NA} LR10_SETTINGS {NA NA} LR11_SETTINGS {NA NA} LR12_SETTINGS {NA NA} LR13_SETTINGS {NA NA} LR14_SETTINGS {NA NA} LR15_SETTINGS {NA NA}"
+            "GT_TYPE GTYP GT_DIRECTION SIMPLEX_TX LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false ",
+            "RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENAB",
+            "LE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX",
+            "_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS {NA NA} LR2_SETTINGS {NA NA} LR3_SETTINGS {NA NA} LR4_SETTINGS {NA NA} LR5_SETTINGS {NA NA} LR6_SETTINGS {NA NA} LR7_SETTIN",
+            "GS {NA NA} LR8_SETTINGS {NA NA} LR9_SETTINGS {NA NA} LR10_SETTINGS {NA NA} LR11_SETTINGS {NA NA} LR12_SETTINGS {NA NA} LR13_SETTINGS {NA NA} LR14_SETTINGS {NA NA} LR15_SETTINGS {NA NA}"
             ], "resolve_type": "user", "usage": "all", "data_type": "tcldict:internal" } ],
         "INTF1_GT_INTERNAL": [ { "value": [
             "GT_TYPE GTYP GT_DIRECTION DUPLEX LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE false RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.265625 RXRECCLK_FREQ_ENABLE false RXRECCLK_FREQ_VAL 0 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN",
@@ -113,10 +113,10 @@
             "8_SETTINGS {NA NA} LR9_SETTINGS {NA NA} LR10_SETTINGS {NA NA} LR11_SETTINGS {NA NA} LR12_SETTINGS {NA NA} LR13_SETTINGS {NA NA} LR14_SETTINGS {NA NA} LR15_SETTINGS {NA NA}"
             ], "resolve_type": "user", "usage": "all", "data_type": "tcldict:internal" } ],
         "INTF0_LR0_SETTINGS": [ { "value": [
-            "GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_CB_MASK_0_1 fal",
-            "se RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000000000000000000000",
-            "0000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROGRAMMABLE RX_TE",
-            "RMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32"
+            "GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_CB_MASK_0_1",
+            " false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 000000000000000000",
+            "00000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROGRAM",
+            "MABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32"
             ], "resolve_type": "user", "usage": "all", "data_type": "internal" } ],
         "INTF0_LR1_SETTINGS": [ { "value": "NA NA", "resolve_type": "user", "usage": "all", "data_type": "internal" } ],
         "INTF0_LR2_SETTINGS": [ { "value": "NA NA", "resolve_type": "user", "usage": "all", "data_type": "internal" } ],
@@ -321,46 +321,46 @@
         "QUAD4_PROT5": [ { "value": "INTF0", "resolve_type": "user", "usage": "all" } ],
         "QUAD4_PROT6": [ { "value": "INTF0", "resolve_type": "user", "usage": "all" } ],
         "QUAD4_PROT7": [ { "value": "INTF0", "resolve_type": "user", "usage": "all" } ],
-        "QUAD0_PROT0_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT1_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT2_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT3_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT4_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT5_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT6_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT7_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT0_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT1_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT2_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT3_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT4_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT5_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT6_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD1_PROT7_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT0_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT1_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT2_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT3_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT4_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT5_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT6_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD2_PROT7_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT0_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT1_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT2_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT3_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT4_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT5_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT6_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD3_PROT7_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT0_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT1_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT2_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT3_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT4_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT5_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT6_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD4_PROT7_DIR": [ { "value": "DUPLEX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT0_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT1_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT2_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT3_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT4_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT5_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT6_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD0_PROT7_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT0_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT1_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT2_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT3_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT4_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT5_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT6_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT7_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT0_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT1_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT2_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT3_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT4_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT5_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT6_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT7_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT0_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT1_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT2_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT3_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT4_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT5_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT6_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT7_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT0_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT1_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT2_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT3_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT4_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT5_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT6_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT7_DIR": [ { "value": "SIMPLEX_TX", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT0_LANES": [ { "value": "4", "resolve_type": "user", "format": "long", "usage": "all" } ],
         "QUAD1_PROT0_LANES": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT0_LANES": [ { "value": "1", "resolve_type": "user", "format": "long", "enabled": false, "usage": "all" } ],
@@ -561,11 +561,11 @@
         "QUAD4_PROT5_TX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT6_TX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT7_TX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT0_RX0_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD1_PROT0_RX0_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD2_PROT0_RX0_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD3_PROT0_RX0_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD4_PROT0_RX0_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
+        "QUAD0_PROT0_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT0_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT0_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT0_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT0_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT1_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT2_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT3_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
@@ -601,11 +601,11 @@
         "QUAD4_PROT5_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT6_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT7_RX0_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT0_RX1_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD1_PROT0_RX1_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD2_PROT0_RX1_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD3_PROT0_RX1_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD4_PROT0_RX1_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
+        "QUAD0_PROT0_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT0_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT0_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT0_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT0_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT1_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT2_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT3_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
@@ -641,11 +641,11 @@
         "QUAD4_PROT5_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT6_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT7_RX1_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT0_RX2_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD1_PROT0_RX2_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD2_PROT0_RX2_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD3_PROT0_RX2_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD4_PROT0_RX2_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
+        "QUAD0_PROT0_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT0_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT0_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT0_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT0_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT1_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT2_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT3_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
@@ -681,11 +681,11 @@
         "QUAD4_PROT5_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT6_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT7_RX2_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT0_RX3_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD1_PROT0_RX3_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD2_PROT0_RX3_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD3_PROT0_RX3_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD4_PROT0_RX3_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
+        "QUAD0_PROT0_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD1_PROT0_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD2_PROT0_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD3_PROT0_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD4_PROT0_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT1_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT2_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT3_RX3_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
@@ -761,7 +761,7 @@
         "QUAD4_PROT5_TXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT6_TXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT7_TXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "QUAD0_PROT0_RXMSTCLK": [ { "value": "None", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
+        "QUAD0_PROT0_RXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT1_RXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT2_RXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT3_RXMSTCLK": [ { "value": "None", "resolve_type": "user", "enabled": false, "usage": "all" } ],
@@ -818,10 +818,10 @@
         "QUAD0_TX1_OUTCLK_EN": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
         "QUAD0_TX2_OUTCLK_EN": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
         "QUAD0_TX3_OUTCLK_EN": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD0_RX0_OUTCLK_EN": [ { "value": "true", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD0_RX1_OUTCLK_EN": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD0_RX2_OUTCLK_EN": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
-        "QUAD0_RX3_OUTCLK_EN": [ { "value": "true", "value_src": "user", "resolve_type": "user", "format": "bool", "usage": "all" } ],
+        "QUAD0_RX0_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD0_RX1_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD0_RX2_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
+        "QUAD0_RX3_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD1_TX0_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD1_TX1_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "QUAD1_TX2_OUTCLK_EN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
@@ -1125,15 +1125,15 @@
         "ENABLE_NORTHOUT_SOUTHIN": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "ENABLE_NORTHIN_SOUTHOUT": [ { "value": "false", "resolve_type": "user", "format": "bool", "enabled": false, "usage": "all" } ],
         "INTF0_TXRX_OPTIONAL_PORTS": [ { "value": [
-            "GT_TYPE GTYP GT_DIRECTION DUPLEX ch_txdata true ch_txbufstatus true ch_txdccdone false ch_gttxreset false ch_txdebugpcsout false ch_txpmaresetdone false ch_txprogdivresetdone false ch_txresetdone false ch_txmstresetdone false ch_txinhibit false ch_txlatclk false ch_txmaincursor false ch_txpcsresetmask false ch_txpd false ch_txpisopd false ch_txpmaresetmask false ch_txpolarity true ch_txpostcursor false ch_txprbsforceerr false ch_txprbssel false ch_txprecursor false ch_txprecursor2 false ch_txprecursor3 false ch_txprogdivreset false ch_txrate true ch_txresetmode false ch_txmstreset false ch_txmstdatapathreset false ch_txuserrdy false ch_txrsv0 false ch_txrsv1 false ch_txperst false ch_txqprbsen false ch_txheader false ch_txsequence false ch_txphalignresetmask false ch_txcominit false ch_txcomsas false ch_txcomwake false ch_txdapicodeovrden false ch_txdapicodereset false ch_txdetectrx false ch_txphdlytstclk false ch_txdlyalignreq false ch_txelecidle false ch_txmldchaindone false ch_txml",
-            "dchainreq false ch_txoneszeros false ch_txpausedelayalign false ch_txphalignreq false ch_txphdlypd false ch_txphdlyreset false ch_txphsetinitreq false ch_txphshift180 false ch_txpicodeovrden false ch_txpicodereset false ch_txpippmen true ch_txswing false ch_txsyncallin false ch_tx10gstat false ch_txcomfinish false ch_txdlyalignerr false ch_txdlyalignprog false ch_txphaligndone false ch_txphalignerr false ch_txphalignoutrsvd false ch_txphdlyresetdone false ch_txphsetinitdone false ch_txphshift180done false ch_txsyncdone false ch_txctrl0 true ch_txctrl1 true ch_txctrl2 true ch_txdeemph false ch_txmargin false ch_txdiffctrl false ch_txpippmstepsize true ch_txdataextendrsvd false ch_txdapiresetdone false ch_txqpisenn false ch_txqpisenp false ch_txswingouthigh false ch_txswingoutlow false ch_txdapireset false ch_txdapiresetmask false ch_txqpibiasen false ch_txqpiweakpu false ch_txsimplexphystatus false ch_rxbufstatus false ch_rxcdrlock false ch_rxdebugpcsout false ch_rxpmaresetdone false c",
-            "h_rxprbserr false ch_rxprbslocked false ch_rxcdrhold false ch_rxcdrovrden false ch_rxlatclk false ch_rxpcsresetmask false ch_rxpd false ch_rxperst false ch_rxpmaresetmask false ch_rxpolarity true ch_rxprbscntreset false ch_rxqprbsen false ch_rxrate true ch_rxmstresetdone false ch_rxresetmode false ch_rxmstreset false ch_rxmstdatapathreset false ch_rxrsv0 false ch_rxrsv1 false ch_rxrsv2 false ch_rxuserrdy false ch_rxdata true ch_rx10gstat false ch_rxdatavalid false ch_rxheader false ch_rxchanisaligned false ch_rxchanrealign false ch_rxchbondi false ch_rxchbondo false ch_rxclkcorcnt false ch_rxcominitdet false ch_rxcommadet false ch_rxbyteisaligned false ch_rxbyterealign false ch_rxcomsasdet false ch_rxcomwakedet false ch_rxctrl0 false ch_rxctrl1 false ch_rxctrl2 false ch_rxctrl3 false ch_rxdapicodeovrden false ch_rxdapicodereset false ch_rxdlyalignerr false ch_rxdlyalignprog false ch_rxdlyalignreq false ch_rxelecidle false ch_rxeqtraining false ch_rxfinealigndone false ch_rxgearboxslip",
-            " false ch_rxheadervalid false ch_rxlpmen false ch_rxmldchaindone false ch_rxmldchainreq false ch_rxmlfinealignreq false ch_rxoobreset false ch_rxosintdone false ch_rxphaligndone false ch_rxphalignerr false ch_rxphalignreq false ch_rxphalignresetmask false ch_rxphdlypd false ch_rxphdlyreset false ch_rxphdlyresetdone false ch_rxphsetinitreq false ch_rxphshift180 false ch_rxphshift180done false ch_rxphsetinitdone false ch_rxslide false ch_rxsliderdy false ch_rxstartofseq false ch_rxstatus false ch_rxsyncallin false ch_rxsyncdone false ch_rxtermination false ch_rxvalid false ch_rxchanbondseq false ch_rxchanbond_busy false ch_rxchanbond_en false ch_rxchanbond_master false ch_rxchanbond_slave false ch_rxchanbond_level false ch_cdrbmcdrreq false ch_cdrfreqos false ch_cdrincpctrl false ch_cdrstepdir false ch_cdrstepsq false ch_cdrstepsx false ch_eyescanreset false ch_eyescantrigger false ch_eyescandataerror false ch_cfokovrdrdy0 false ch_cfokovrdrdy1 false ch_rxdataextendrsvd false ch_rxdccdo",
-            "ne false ch_rxosintstarted false ch_rxosintstrobedone false ch_cfokovrdfinish false ch_cfokovrdpulse false ch_cfokovrdstart false ch_refdebugout false ch_rxdapiresetdone false ch_rxpkdet false ch_rxqpisenn false ch_rxqpisenp false ch_rxsimplexphystatus false ch_rxslipdone false ch_dfehold false ch_dfeovrd false ch_rxdapireset false ch_rxdapiresetmask false ch_rxqpien false ch_rxcdrphdone false ch_gtrxreset false ch_rxprogdivresetdone false ch_rxresetdone false ch_rxcdrreset false ch_rxprbscntstop false ch_rxprbssel false ch_rxprogdivreset false ch_rxosintstrobestarted false INTF_LR_SETTINGS {LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLE",
-            "R false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false R",
-            "X_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET N",
-            "ONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM",
-            " TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }} LOCATE_RESETIP CORE CHANNEL_BONDING false ALL_PORTS false"
+            "GT_TYPE GTYP GT_DIRECTION SIMPLEX_TX ch_txdata true ch_txbufstatus false ch_txdccdone false ch_gttxreset false ch_txdebugpcsout false ch_txpmaresetdone false ch_txprogdivresetdone false ch_txresetdone false ch_txmstresetdone false ch_txinhibit false ch_txlatclk false ch_txmaincursor false ch_txpcsresetmask false ch_txpd false ch_txpisopd false ch_txpmaresetmask false ch_txpolarity false ch_txpostcursor false ch_txprbsforceerr false ch_txprbssel false ch_txprecursor false ch_txprecursor2 false ch_txprecursor3 false ch_txprogdivreset false ch_txrate true ch_txresetmode false ch_txmstreset false ch_txmstdatapathreset false ch_txuserrdy false ch_txrsv0 false ch_txrsv1 false ch_txperst false ch_txqprbsen false ch_txheader false ch_txsequence false ch_txphalignresetmask false ch_txcominit false ch_txcomsas false ch_txcomwake false ch_txdapicodeovrden false ch_txdapicodereset false ch_txdetectrx false ch_txphdlytstclk false ch_txdlyalignreq false ch_txelecidle false ch_txmldchaindone false c",
+            "h_txmldchainreq false ch_txoneszeros false ch_txpausedelayalign false ch_txphalignreq false ch_txphdlypd false ch_txphdlyreset false ch_txphsetinitreq false ch_txphshift180 false ch_txpicodeovrden false ch_txpicodereset false ch_txpippmen false ch_txswing false ch_txsyncallin false ch_tx10gstat false ch_txcomfinish false ch_txdlyalignerr false ch_txdlyalignprog false ch_txphaligndone false ch_txphalignerr false ch_txphalignoutrsvd false ch_txphdlyresetdone false ch_txphsetinitdone false ch_txphshift180done false ch_txsyncdone false ch_txctrl0 true ch_txctrl1 true ch_txctrl2 true ch_txdeemph false ch_txmargin false ch_txdiffctrl false ch_txpippmstepsize false ch_txdataextendrsvd false ch_txdapiresetdone false ch_txqpisenn false ch_txqpisenp false ch_txswingouthigh false ch_txswingoutlow false ch_txdapireset false ch_txdapiresetmask false ch_txqpibiasen false ch_txqpiweakpu false ch_txsimplexphystatus false ch_rxbufstatus false ch_rxcdrlock false ch_rxdebugpcsout false ch_rxpmaresetdone",
+            " false ch_rxprbserr false ch_rxprbslocked false ch_rxcdrhold false ch_rxcdrovrden false ch_rxlatclk false ch_rxpcsresetmask false ch_rxpd false ch_rxperst false ch_rxpmaresetmask false ch_rxpolarity false ch_rxprbscntreset false ch_rxqprbsen false ch_rxrate false ch_rxmstresetdone false ch_rxresetmode false ch_rxmstreset false ch_rxmstdatapathreset false ch_rxrsv0 false ch_rxrsv1 false ch_rxrsv2 false ch_rxuserrdy false ch_rxdata false ch_rx10gstat false ch_rxdatavalid false ch_rxheader false ch_rxchanisaligned false ch_rxchanrealign false ch_rxchbondi false ch_rxchbondo false ch_rxclkcorcnt false ch_rxcominitdet false ch_rxcommadet false ch_rxbyteisaligned false ch_rxbyterealign false ch_rxcomsasdet false ch_rxcomwakedet false ch_rxctrl0 false ch_rxctrl1 false ch_rxctrl2 false ch_rxctrl3 false ch_rxdapicodeovrden false ch_rxdapicodereset false ch_rxdlyalignerr false ch_rxdlyalignprog false ch_rxdlyalignreq false ch_rxelecidle false ch_rxeqtraining false ch_rxfinealigndone false ch_rx",
+            "gearboxslip false ch_rxheadervalid false ch_rxlpmen false ch_rxmldchaindone false ch_rxmldchainreq false ch_rxmlfinealignreq false ch_rxoobreset false ch_rxosintdone false ch_rxphaligndone false ch_rxphalignerr false ch_rxphalignreq false ch_rxphalignresetmask false ch_rxphdlypd false ch_rxphdlyreset false ch_rxphdlyresetdone false ch_rxphsetinitreq false ch_rxphshift180 false ch_rxphshift180done false ch_rxphsetinitdone false ch_rxslide false ch_rxsliderdy false ch_rxstartofseq false ch_rxstatus false ch_rxsyncallin false ch_rxsyncdone false ch_rxtermination false ch_rxvalid false ch_rxchanbondseq false ch_rxchanbond_busy false ch_rxchanbond_en false ch_rxchanbond_master false ch_rxchanbond_slave false ch_rxchanbond_level false ch_cdrbmcdrreq false ch_cdrfreqos false ch_cdrincpctrl false ch_cdrstepdir false ch_cdrstepsq false ch_cdrstepsx false ch_eyescanreset false ch_eyescantrigger false ch_eyescandataerror false ch_cfokovrdrdy0 false ch_cfokovrdrdy1 false ch_rxdataextendrsvd false",
+            " ch_rxdccdone false ch_rxosintstarted false ch_rxosintstrobedone false ch_cfokovrdfinish false ch_cfokovrdpulse false ch_cfokovrdstart false ch_refdebugout false ch_rxdapiresetdone false ch_rxpkdet false ch_rxqpisenn false ch_rxqpisenp false ch_rxsimplexphystatus false ch_rxslipdone false ch_dfehold false ch_dfeovrd false ch_rxdapireset false ch_rxdapiresetmask false ch_rxqpien false ch_rxcdrphdone false ch_gtrxreset false ch_rxprogdivresetdone false ch_rxresetdone false ch_rxcdrreset false ch_rxprbscntstop false ch_rxprbssel false ch_rxprogdivreset false ch_rxosintstrobestarted false INTF_LR_SETTINGS {LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64",
+            "B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_D",
+            "ISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX",
+            "_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF",
+            "_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }} LOCATE_RESETIP CORE CHANNEL_BONDING false ALL_PORTS false"
             ], "resolve_type": "user", "usage": "all", "data_type": "tcldict:internal" } ],
         "INTF1_TXRX_OPTIONAL_PORTS": [ { "value": [
             "GT_TYPE GTYP GT_DIRECTION DUPLEX ch_txdata true ch_txbufstatus false ch_txdccdone false ch_gttxreset false ch_txdebugpcsout false ch_txpmaresetdone false ch_txprogdivresetdone false ch_txresetdone false ch_txmstresetdone false ch_txinhibit false ch_txlatclk false ch_txmaincursor false ch_txpcsresetmask false ch_txpd false ch_txpisopd false ch_txpmaresetmask false ch_txpolarity false ch_txpostcursor false ch_txprbsforceerr false ch_txprbssel false ch_txprecursor false ch_txprecursor2 false ch_txprecursor3 false ch_txprogdivreset false ch_txrate true ch_txresetmode false ch_txmstreset false ch_txmstdatapathreset false ch_txuserrdy false ch_txrsv0 false ch_txrsv1 false ch_txperst false ch_txqprbsen false ch_txheader false ch_txsequence false ch_txphalignresetmask false ch_txcominit false ch_txcomsas false ch_txcomwake false ch_txdapicodeovrden false ch_txdapicodereset false ch_txdetectrx false ch_txphdlytstclk false ch_txdlyalignreq false ch_txelecidle false ch_txmldchaindone false ch_tx",
@@ -1212,7 +1212,7 @@
             "RESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXOUTCLKPMA RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 322.265625 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING RAW TX_DIFF_SWING_EMPH",
             "_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 32 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 10.3125 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 156.25 TX_REFCLK_SOURCE R0 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }} LOCATE_RESETIP CORE CHANNEL_BONDING false ALL_PORTS false"
             ], "resolve_type": "user", "usage": "all", "data_type": "tcldict:internal" } ],
-        "INTF0_OPTIONAL_PORTS": [ { "value": "ch_rxpolarity true ch_txbufstatus true ch_txpippmen true ch_txpippmstepsize true ch_txpolarity true", "value_src": "user", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
+        "INTF0_OPTIONAL_PORTS": [ { "value": "", "value_src": "user", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
         "INTF1_OPTIONAL_PORTS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
         "INTF2_OPTIONAL_PORTS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
         "INTF3_OPTIONAL_PORTS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
@@ -1220,7 +1220,7 @@
         "INTF5_OPTIONAL_PORTS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
         "INTF6_OPTIONAL_PORTS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
         "INTF7_OPTIONAL_PORTS": [ { "value": "", "resolve_type": "user", "usage": "all", "data_type": "tcldict" } ],
-        "INTF0_LANE_MAP": [ { "value": "INTF0 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "INTF0_LANE_MAP": [ { "value": "INTF0 {QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF1_LANE_MAP": [ { "value": "INTF1 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF2_LANE_MAP": [ { "value": "INTF2 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF3_LANE_MAP": [ { "value": "INTF3 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
@@ -1228,7 +1228,7 @@
         "INTF5_LANE_MAP": [ { "value": "INTF5 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF6_LANE_MAP": [ { "value": "INTF6 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF7_LANE_MAP": [ { "value": "INTF7 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "INTF0_CHANNEL_MAP": [ { "value": "INTF0_RX0 QUAD0_RX0 INTF0_RX1 QUAD0_RX1 INTF0_RX2 QUAD0_RX2 INTF0_RX3 QUAD0_RX3 INTF0_TX0 QUAD0_TX0 INTF0_TX1 QUAD0_TX1 INTF0_TX2 QUAD0_TX2 INTF0_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "INTF0_CHANNEL_MAP": [ { "value": "INTF0_TX0 QUAD0_TX0 INTF0_TX1 QUAD0_TX1 INTF0_TX2 QUAD0_TX2 INTF0_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF1_CHANNEL_MAP": [ { "value": "INTF1_RX0 QUAD0_RX0 INTF1_RX1 QUAD0_RX1 INTF1_RX2 QUAD0_RX2 INTF1_RX3 QUAD0_RX3 INTF1_TX0 QUAD0_TX0 INTF1_TX1 QUAD0_TX1 INTF1_TX2 QUAD0_TX2 INTF1_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF2_CHANNEL_MAP": [ { "value": "INTF2_RX0 QUAD0_RX0 INTF2_RX1 QUAD0_RX1 INTF2_RX2 QUAD0_RX2 INTF2_RX3 QUAD0_RX3 INTF2_TX0 QUAD0_TX0 INTF2_TX1 QUAD0_TX1 INTF2_TX2 QUAD0_TX2 INTF2_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF3_CHANNEL_MAP": [ { "value": "INTF3_RX0 QUAD0_RX0 INTF3_RX1 QUAD0_RX1 INTF3_RX2 QUAD0_RX2 INTF3_RX3 QUAD0_RX3 INTF3_TX0 QUAD0_TX0 INTF3_TX1 QUAD0_TX1 INTF3_TX2 QUAD0_TX2 INTF3_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
@@ -1236,7 +1236,7 @@
         "INTF5_CHANNEL_MAP": [ { "value": "INTF5_RX0 QUAD0_RX0 INTF5_RX1 QUAD0_RX1 INTF5_RX2 QUAD0_RX2 INTF5_RX3 QUAD0_RX3 INTF5_TX0 QUAD0_TX0 INTF5_TX1 QUAD0_TX1 INTF5_TX2 QUAD0_TX2 INTF5_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF6_CHANNEL_MAP": [ { "value": "INTF6_RX0 QUAD0_RX0 INTF6_RX1 QUAD0_RX1 INTF6_RX2 QUAD0_RX2 INTF6_RX3 QUAD0_RX3 INTF6_TX0 QUAD0_TX0 INTF6_TX1 QUAD0_TX1 INTF6_TX2 QUAD0_TX2 INTF6_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF7_CHANNEL_MAP": [ { "value": "INTF7_RX0 QUAD0_RX0 INTF7_RX1 QUAD0_RX1 INTF7_RX2 QUAD0_RX2 INTF7_RX3 QUAD0_RX3 INTF7_TX0 QUAD0_TX0 INTF7_TX1 QUAD0_TX1 INTF7_TX2 QUAD0_TX2 INTF7_TX3 QUAD0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
-        "INTF_QUAD_CHANNEL_MAP": [ { "value": "QUAD0_RX0 INTF0_RX0 QUAD0_RX1 INTF0_RX1 QUAD0_RX2 INTF0_RX2 QUAD0_RX3 INTF0_RX3 QUAD0_TX0 INTF0_TX0 QUAD0_TX1 INTF0_TX1 QUAD0_TX2 INTF0_TX2 QUAD0_TX3 INTF0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
+        "INTF_QUAD_CHANNEL_MAP": [ { "value": "QUAD0_TX0 INTF0_TX0 QUAD0_TX1 INTF0_TX1 QUAD0_TX2 INTF0_TX2 QUAD0_TX3 INTF0_TX3", "resolve_type": "user", "enabled": false, "usage": "all" } ],
         "INTF0_PARENTID": [ { "value": "undef", "resolve_type": "user", "usage": "all" } ],
         "INTF1_PARENTID": [ { "value": "undef", "resolve_type": "user", "usage": "all" } ],
         "INTF2_PARENTID": [ { "value": "undef", "resolve_type": "user", "usage": "all" } ],
@@ -1254,12 +1254,12 @@
         "INTF6_PCIE_ENABLE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
         "INTF7_PCIE_ENABLE": [ { "value": "false", "resolve_type": "user", "format": "bool", "usage": "all" } ],
         "INTF_PARENT_PIN_LIST": [ { "value": "0", "resolve_type": "user", "usage": "all" } ],
-        "QUAD0_USAGE": [ { "value": "TX_QUAD_CH {TXQuad_0_/transceiver_versal_interlaken/transceiver_versal_interlaken_gt_quad_base_0 {/transceiver_versal_interlaken/gt_quad_base_0 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 0,0,0,0 IS_CURRENT_QUAD 1}} RX_QUAD_CH {RXQuad_0_/transceiver_versal_interlaken/transceiver_versal_interlaken_gt_quad_base_0 {/transceiver_versal_interlaken/gt_quad_base_0 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 0,0,0,0 IS_CURRENT_QUAD 1}}", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
+        "QUAD0_USAGE": [ { "value": "TX_QUAD_CH {TXQuad_0_/transceiver_versal_interlaken/transceiver_versal_interlaken_gt_quad_base_0 {/transceiver_versal_interlaken/gt_quad_base_0 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 0,0,0,0 IS_CURRENT_QUAD 1}} RX_QUAD_CH {RXQuad_0_/transceiver_versal_interlaken/transceiver_versal_interlaken_gt_quad_base_0 {/transceiver_versal_interlaken/gt_quad_base_0 undef,undef,undef,undef MSTRCLK 0,0,0,0 IS_CURRENT_QUAD 1}}", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
         "QUAD1_USAGE": [ { "value": "TX_QUAD_CH {TXQuad_1_/gtwiz_versal/gt_quad_base_1 {/gtwiz_versal/gt_quad_base_1 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 1}} RX_QUAD_CH {RXQuad_1_/gtwiz_versal/gt_quad_base_1 {/gtwiz_versal/gt_quad_base_1 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 1}}", "resolve_type": "user", "usage": "all" } ],
         "QUAD2_USAGE": [ { "value": "TX_QUAD_CH {TXQuad_2_/gtwiz_versal/gt_quad_base_2 {/gtwiz_versal/gt_quad_base_2 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 2}} RX_QUAD_CH {RXQuad_2_/gtwiz_versal/gt_quad_base_2 {/gtwiz_versal/gt_quad_base_2 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 2}}", "resolve_type": "user", "usage": "all" } ],
         "QUAD3_USAGE": [ { "value": "TX_QUAD_CH {TXQuad_3_/gtwiz_versal/gt_quad_base_3 {/gtwiz_versal/gt_quad_base_3 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 3}} RX_QUAD_CH {RXQuad_3_/gtwiz_versal/gt_quad_base_3 {/gtwiz_versal/gt_quad_base_3 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 3}}", "resolve_type": "user", "usage": "all" } ],
         "QUAD4_USAGE": [ { "value": "TX_QUAD_CH {TXQuad_4_/gtwiz_versal/gt_quad_base_4 {/gtwiz_versal/gt_quad_base_4 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 4}} RX_QUAD_CH {RXQuad_4_/gtwiz_versal/gt_quad_base_4 {/gtwiz_versal/gt_quad_base_4 INTF0.IP_CH0,INTF0.IP_CH1,INTF0.IP_CH2,INTF0.IP_CH3 MSTRCLK 1,0,0,0 IS_CURRENT_QUAD 4}}", "resolve_type": "user", "usage": "all" } ],
-        "QUAD0_REFCLK_STRING": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_R0_156.25_MHz_unique1 HSCLK0_RPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_R0_156.25_MHz_unique1 HSCLK1_RPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
+        "QUAD0_REFCLK_STRING": [ { "value": "HSCLK0_LCPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1 HSCLK1_LCPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1", "value_src": "user", "resolve_type": "user", "usage": "all" } ],
         "QUAD1_REFCLK_STRING": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "user", "usage": "all" } ],
         "QUAD2_REFCLK_STRING": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "user", "usage": "all" } ],
         "QUAD3_REFCLK_STRING": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "user", "usage": "all" } ],
@@ -1313,43 +1313,43 @@
         "QUAD2_TX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_TX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_TX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_RX0_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD1_RX0_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD2_RX0_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD3_RX0_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD4_RX0_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_RX1_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD1_RX1_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD2_RX1_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD3_RX1_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD4_RX1_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_RX2_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD1_RX2_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD2_RX2_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD3_RX2_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD4_RX2_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_RX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD1_RX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD2_RX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD3_RX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD4_RX3_LANE_SEL": [ { "value": "PROT0", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "INTF_CHANNEL_NUMBERING": [ { "value": "QUAD0_RX0 0 QUAD0_RX1 1 QUAD0_RX2 2 QUAD0_RX3 3 QUAD0_TX0 0 QUAD0_TX1 1 QUAD0_TX2 2 QUAD0_TX3 3", "resolve_type": "generated", "usage": "all" } ],
+        "QUAD0_RX0_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD1_RX0_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD2_RX0_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD3_RX0_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD4_RX0_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD0_RX1_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD1_RX1_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD2_RX1_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD3_RX1_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD4_RX1_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD0_RX2_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD1_RX2_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD2_RX2_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD3_RX2_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD4_RX2_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD0_RX3_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD1_RX3_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD2_RX3_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD3_RX3_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD4_RX3_LANE_SEL": [ { "value": "unconnected", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "INTF_CHANNEL_NUMBERING": [ { "value": "QUAD0_TX0 0 QUAD0_TX1 1 QUAD0_TX2 2 QUAD0_TX3 3", "resolve_type": "generated", "usage": "all" } ],
         "QUAD0_LANE_SATISFIED": [ { "value": "1 {}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_LANE_SATISFIED": [ { "value": "1 {}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_LANE_SATISFIED": [ { "value": "1 {}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_LANE_SATISFIED": [ { "value": "1 {}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_LANE_SATISFIED": [ { "value": "1 {}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_COMMON_SETTINGS": [ { "value": "mode full bonded true LANEUSAGE {PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD0_COMMON_SETTINGS": [ { "value": "mode full bonded true LANEUSAGE {PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_COMMON_SETTINGS": [ { "value": "mode full bonded true LANEUSAGE {PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_COMMON_SETTINGS": [ { "value": "mode full bonded true LANEUSAGE {PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_COMMON_SETTINGS": [ { "value": "mode full bonded true LANEUSAGE {PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_COMMON_SETTINGS": [ { "value": "mode full bonded true LANEUSAGE {PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_LANE_SEL_DICT": [ { "value": "PROT0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD0_LANE_SEL_DICT": [ { "value": "unconnected {RX0 RX1 RX2 RX3} PROT0 {TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_LANE_SEL_DICT": [ { "value": "PROT0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_LANE_SEL_DICT": [ { "value": "PROT0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_LANE_SEL_DICT": [ { "value": "PROT0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_LANE_SEL_DICT": [ { "value": "PROT0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_INTF_LANESEL_DICT": [ { "value": "INTF0 {{RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "QUAD0_INTF_LANESEL_DICT": [ { "value": "INTF0 {{TX0 TX1 TX2 TX3}} unconnected {{RX0 RX1 RX2 RX3}}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_INTF_LANESEL_DICT": [ { "value": "INTF0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_INTF_LANESEL_DICT": [ { "value": "INTF0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_INTF_LANESEL_DICT": [ { "value": "INTF0 {RX0 RX1 RX2 RX3 TX0 TX1 TX2 TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
@@ -1359,7 +1359,7 @@
         "QUAD2_MSTCLK_SRC_DICT": [ { "value": "TX {1,0,0,0,} RX {1,0,0,0,} ", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_MSTCLK_SRC_DICT": [ { "value": "TX {1,0,0,0,} RX {1,0,0,0,} ", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_MSTCLK_SRC_DICT": [ { "value": "TX {1,0,0,0,} RX {1,0,0,0,} ", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "INTF0_LANE_MAPING": [ { "value": "INTF0 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "INTF0_LANE_MAPING": [ { "value": "INTF0 {QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF1_LANE_MAPING": [ { "value": "INTF1 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF2_LANE_MAPING": [ { "value": "INTF2 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF3_LANE_MAPING": [ { "value": "INTF3 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
@@ -1367,7 +1367,7 @@
         "INTF5_LANE_MAPING": [ { "value": "INTF5 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF6_LANE_MAPING": [ { "value": "INTF6 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF7_LANE_MAPING": [ { "value": "INTF7 {QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "INTF0_CHANNEL_MAPING": [ { "value": "INTF0_RX0 QUAD0_RX0 INTF0_RX1 QUAD0_RX1 INTF0_RX2 QUAD0_RX2 INTF0_RX3 QUAD0_RX3 INTF0_TX0 QUAD0_TX0 INTF0_TX1 QUAD0_TX1 INTF0_TX2 QUAD0_TX2 INTF0_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "INTF0_CHANNEL_MAPING": [ { "value": "INTF0_TX0 QUAD0_TX0 INTF0_TX1 QUAD0_TX1 INTF0_TX2 QUAD0_TX2 INTF0_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF1_CHANNEL_MAPING": [ { "value": "INTF1_RX0 QUAD0_RX0 INTF1_RX1 QUAD0_RX1 INTF1_RX2 QUAD0_RX2 INTF1_RX3 QUAD0_RX3 INTF1_TX0 QUAD0_TX0 INTF1_TX1 QUAD0_TX1 INTF1_TX2 QUAD0_TX2 INTF1_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF2_CHANNEL_MAPING": [ { "value": "INTF2_RX0 QUAD0_RX0 INTF2_RX1 QUAD0_RX1 INTF2_RX2 QUAD0_RX2 INTF2_RX3 QUAD0_RX3 INTF2_TX0 QUAD0_TX0 INTF2_TX1 QUAD0_TX1 INTF2_TX2 QUAD0_TX2 INTF2_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF3_CHANNEL_MAPING": [ { "value": "INTF3_RX0 QUAD0_RX0 INTF3_RX1 QUAD0_RX1 INTF3_RX2 QUAD0_RX2 INTF3_RX3 QUAD0_RX3 INTF3_TX0 QUAD0_TX0 INTF3_TX1 QUAD0_TX1 INTF3_TX2 QUAD0_TX2 INTF3_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
@@ -1375,297 +1375,297 @@
         "INTF5_CHANNEL_MAPING": [ { "value": "INTF5_RX0 QUAD0_RX0 INTF5_RX1 QUAD0_RX1 INTF5_RX2 QUAD0_RX2 INTF5_RX3 QUAD0_RX3 INTF5_TX0 QUAD0_TX0 INTF5_TX1 QUAD0_TX1 INTF5_TX2 QUAD0_TX2 INTF5_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF6_CHANNEL_MAPING": [ { "value": "INTF6_RX0 QUAD0_RX0 INTF6_RX1 QUAD0_RX1 INTF6_RX2 QUAD0_RX2 INTF6_RX3 QUAD0_RX3 INTF6_TX0 QUAD0_TX0 INTF6_TX1 QUAD0_TX1 INTF6_TX2 QUAD0_TX2 INTF6_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "INTF7_CHANNEL_MAPING": [ { "value": "INTF7_RX0 QUAD0_RX0 INTF7_RX1 QUAD0_RX1 INTF7_RX2 QUAD0_RX2 INTF7_RX3 QUAD0_RX3 INTF7_TX0 QUAD0_TX0 INTF7_TX1 QUAD0_TX1 INTF7_TX2 QUAD0_TX2 INTF7_TX3 QUAD0_TX3", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "INTF_LANE_MAP_LIST": [ { "value": "QUAD0_RX0 QUAD0_RX1 QUAD0_RX2 QUAD0_RX3 QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3", "resolve_type": "generated", "usage": "all" } ],
-        "QUAD0_LANEUSAGE": [ { "value": "PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "INTF_LANE_MAP_LIST": [ { "value": "QUAD0_TX0 QUAD0_TX1 QUAD0_TX2 QUAD0_TX3", "resolve_type": "generated", "usage": "all" } ],
+        "QUAD0_LANEUSAGE": [ { "value": "PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_LANEUSAGE": [ { "value": "PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_LANEUSAGE": [ { "value": "PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_LANEUSAGE": [ { "value": "PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_LANEUSAGE": [ { "value": "PROT0 {group A rates 0 txrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 tx 0,1,2,3 rxrate PROT0.D1,PROT0.D1,PROT0.D1,PROT0.D1 rx 0,1,2,3}", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
-        "QUAD0_REFCLK_SEL": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_R0_156.25_MHz_unique1 HSCLK0_RPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_R0_156.25_MHz_unique1 HSCLK1_RPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1", "resolve_type": "generated", "usage": "all" } ],
+        "QUAD0_REFCLK_SEL": [ { "value": "HSCLK0_LCPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1 HSCLK1_LCPLLGTREFCLK1 refclk_PROT0_R1_240.474_MHz_unique1", "resolve_type": "generated", "usage": "all" } ],
         "QUAD1_REFCLK_SEL": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "generated", "usage": "all" } ],
         "QUAD2_REFCLK_SEL": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "generated", "usage": "all" } ],
         "QUAD3_REFCLK_SEL": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "generated", "usage": "all" } ],
         "QUAD4_REFCLK_SEL": [ { "value": "HSCLK0_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1 HSCLK1_LCPLLGTREFCLK0 refclk_PROT0_156.250000_MHz_unique1", "resolve_type": "generated", "usage": "all" } ],
-        "INTF_PARENT_PIN_LIST": [ { "value": "QUAD0_RX0 undef QUAD0_RX1 undef QUAD0_RX2 undef QUAD0_RX3 undef QUAD0_TX0 undef QUAD0_TX1 undef QUAD0_TX2 undef QUAD0_TX3 undef", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
+        "INTF_PARENT_PIN_LIST": [ { "value": "QUAD0_TX0 undef QUAD0_TX1 undef QUAD0_TX2 undef QUAD0_TX3 undef", "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT0_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT1_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT2_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT3_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT4_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT5_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT6_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD0_PROT7_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT0_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT1_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT2_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT3_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT4_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT5_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT6_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD1_PROT7_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT0_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT1_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT2_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT3_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT4_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT5_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT6_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD2_PROT7_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT0_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT1_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT2_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT3_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT4_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT5_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT6_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD3_PROT7_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT0_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT1_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT2_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT3_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT4_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT5_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT6_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ],
         "QUAD4_PROT7_SETTINGS": [ { "value": [
-            "LR0_SETTINGS {GT_DIRECTION DUPLEX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 402.832 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 805.664 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 1 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false RX_C",
-            "B_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 00000000",
-            "000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED true RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 64 RX_JTOL_FC 10 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 25.78125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMINATION PROG",
-            "RAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 64 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE RPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXPLLREFCLK TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE RPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR11_SETTINGS {",
-            " } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
+            "LR0_SETTINGS {GT_DIRECTION SIMPLEX_TX GT_TYPE GTYP INS_LOSS_NYQ 20 INTERNAL_PRESET None OOB_ENABLE false PCIE_ENABLE false PCIE_USERCLK2_FREQ 250 PCIE_USERCLK_FREQ 250 PRESET None RESET_SEQUENCE_INTERVAL 0 RXPROGDIV_FREQ_ENABLE true RXPROGDIV_FREQ_SOURCE LCPLL RXPROGDIV_FREQ_VAL 322.266 RXRECCLK_FREQ_ENABLE true RXRECCLK_FREQ_VAL 644.531 RX_64B66B_CRC false RX_64B66B_DECODER false RX_64B66B_DESCRAMBLER false RX_ACTUAL_REFCLK_FREQUENCY 156.250000000000 RX_BUFFER_BYPASS_MODE Fast_Sync RX_BUFFER_BYPASS_MODE_LANE MULTI RX_BUFFER_MODE 0 RX_BUFFER_RESET_ON_CB_CHANGE ENABLE RX_BUFFER_RESET_ON_COMMAALIGN DISABLE RX_BUFFER_RESET_ON_RATE_CHANGE ENABLE RX_CB_DISP_0_0 false RX_CB_DISP_0_1 false RX_CB_DISP_0_2 false RX_CB_DISP_0_3 false RX_CB_DISP_1_0 false RX_CB_DISP_1_1 false RX_CB_DISP_1_2 false RX_CB_DISP_1_3 false RX_CB_K_0_0 false RX_CB_K_0_1 false RX_CB_K_0_2 false RX_CB_K_0_3 false RX_CB_K_1_0 false RX_CB_K_1_1 false RX_CB_K_1_2 false RX_CB_K_1_3 false RX_CB_LEN_SEQ 1 RX_CB_MASK_0_0 false ",
+            "RX_CB_MASK_0_1 false RX_CB_MASK_0_2 false RX_CB_MASK_0_3 false RX_CB_MASK_1_0 false RX_CB_MASK_1_1 false RX_CB_MASK_1_2 false RX_CB_MASK_1_3 false RX_CB_MAX_LEVEL 1 RX_CB_MAX_SKEW 1 RX_CB_NUM_SEQ 0 RX_CB_VAL_0_0 00000000 RX_CB_VAL_0_1 00000000 RX_CB_VAL_0_2 00000000 RX_CB_VAL_0_3 00000000 RX_CB_VAL_1_0 00000000 RX_CB_VAL_1_1 00000000 RX_CB_VAL_1_2 00000000 RX_CB_VAL_1_3 00000000 RX_CC_DISP_0_0 false RX_CC_DISP_0_1 false RX_CC_DISP_0_2 false RX_CC_DISP_0_3 false RX_CC_DISP_1_0 false RX_CC_DISP_1_1 false RX_CC_DISP_1_2 false RX_CC_DISP_1_3 false RX_CC_KEEP_IDLE DISABLE RX_CC_K_0_0 false RX_CC_K_0_1 false RX_CC_K_0_2 false RX_CC_K_0_3 false RX_CC_K_1_0 false RX_CC_K_1_1 false RX_CC_K_1_2 false RX_CC_K_1_3 false RX_CC_LEN_SEQ 1 RX_CC_MASK_0_0 false RX_CC_MASK_0_1 false RX_CC_MASK_0_2 false RX_CC_MASK_0_3 false RX_CC_MASK_1_0 false RX_CC_MASK_1_1 false RX_CC_MASK_1_2 false RX_CC_MASK_1_3 false RX_CC_NUM_SEQ 0 RX_CC_PERIODICITY 5000 RX_CC_PRECEDENCE ENABLE RX_CC_REPEAT_WAIT 0 RX_CC_VAL 0000",
+            "0000000000000000000000000000000000000000000000000000000000000000000000000000 RX_CC_VAL_0_0 00000000 RX_CC_VAL_0_1 00000000 RX_CC_VAL_0_2 00000000 RX_CC_VAL_0_3 00000000 RX_CC_VAL_1_0 00000000 RX_CC_VAL_1_1 00000000 RX_CC_VAL_1_2 00000000 RX_CC_VAL_1_3 00000000 RX_COMMA_ALIGN_WORD 1 RX_COMMA_DOUBLE_ENABLE false RX_COMMA_MASK 0000000000 RX_COMMA_M_ENABLE false RX_COMMA_M_VAL 1010000011 RX_COMMA_PRESET NONE RX_COMMA_P_ENABLE false RX_COMMA_P_VAL 0101111100 RX_COMMA_SHOW_REALIGN_ENABLE true RX_COMMA_VALID_ONLY 0 RX_COUPLING AC RX_DATA_DECODING RAW RX_EQ_MODE AUTO RX_FRACN_ENABLED false RX_FRACN_NUMERATOR 0 RX_FRACN_OVRD false RX_GRAY_BYP true RX_GRAY_LITTLEENDIAN true RX_HD_EN 0 RX_INT_DATA_WIDTH 32 RX_JTOL_FC 6.1862627 RX_JTOL_LF_SLOPE -20 RX_LINE_RATE 10.3125 RX_OUTCLK_SOURCE RXPROGDIVCLK RX_PAM_SEL NRZ RX_PLL_TYPE LCPLL RX_PPM_OFFSET 0 RX_PRECODE_BYP true RX_PRECODE_LITTLEENDIAN false RX_RATE_GROUP A RX_REFCLK_FREQUENCY 156.25 RX_REFCLK_SOURCE R0 RX_SLIDE_MODE OFF RX_SSC_PPM 0 RX_TERMI",
+            "NATION PROGRAMMABLE RX_TERMINATION_PROG_VALUE 800 RX_USER_DATA_WIDTH 32 TXPROGDIV_FREQ_ENABLE false TXPROGDIV_FREQ_SOURCE LCPLL TXPROGDIV_FREQ_VAL 240.474010 TX_64B66B_CRC false TX_64B66B_ENCODER false TX_64B66B_SCRAMBLER false TX_ACTUAL_REFCLK_FREQUENCY 240.474000000000 TX_BUFFER_BYPASS_MODE Fast_Sync TX_BUFFER_MODE 1 TX_BUFFER_RESET_ON_RATE_CHANGE ENABLE TX_DATA_ENCODING 8B10B TX_DIFF_SWING_EMPH_MODE CUSTOM TX_FRACN_ENABLED false TX_FRACN_NUMERATOR 0 TX_FRACN_OVRD false TX_GRAY_BYP true TX_GRAY_LITTLEENDIAN true TX_HD_EN 0 TX_INT_DATA_WIDTH 40 TX_LANE_DESKEW_HDMI_ENABLE false TX_LINE_RATE 9.61896 TX_OUTCLK_SOURCE TXOUTCLKPMA TX_PAM_SEL NRZ TX_PIPM_ENABLE false TX_PLL_TYPE LCPLL TX_PRECODE_BYP true TX_PRECODE_LITTLEENDIAN false TX_RATE_GROUP A TX_REFCLK_FREQUENCY 240.474 TX_REFCLK_SOURCE R1 TX_USER_DATA_WIDTH 32} LR1_SETTINGS { } LR2_SETTINGS { } LR3_SETTINGS { } LR4_SETTINGS { } LR5_SETTINGS { } LR6_SETTINGS { } LR7_SETTINGS { } LR8_SETTINGS { } LR9_SETTINGS { } LR10_SETTINGS { } LR",
+            "11_SETTINGS { } LR12_SETTINGS { } LR13_SETTINGS { } LR14_SETTINGS { } LR15_SETTINGS { }"
             ], "resolve_type": "generated", "enabled": false, "usage": "all" } ]
       },
       "project_parameters": {
@@ -1698,15 +1698,10 @@
         "gtpowergood": [ { "direction": "out" } ],
         "gtwiz_freerun_clk": [ { "direction": "in", "driver_value": "0" } ],
         "QUAD0_GTREFCLK0": [ { "direction": "in", "driver_value": "0" } ],
-        "QUAD0_GTREFCLK1": [ { "direction": "in", "driver_value": "0" } ],
         "QUAD0_TX0_outclk": [ { "direction": "out" } ],
         "QUAD0_TX1_outclk": [ { "direction": "out" } ],
         "QUAD0_TX2_outclk": [ { "direction": "out" } ],
         "QUAD0_TX3_outclk": [ { "direction": "out" } ],
-        "QUAD0_RX0_outclk": [ { "direction": "out" } ],
-        "QUAD0_RX1_outclk": [ { "direction": "out" } ],
-        "QUAD0_RX2_outclk": [ { "direction": "out" } ],
-        "QUAD0_RX3_outclk": [ { "direction": "out" } ],
         "QUAD0_rxp": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "0" } ],
         "QUAD0_rxn": [ { "direction": "in", "size_left": "3", "size_right": "0", "driver_value": "15" } ],
         "QUAD0_txp": [ { "direction": "out", "size_left": "3", "size_right": "0" } ],
@@ -1719,69 +1714,32 @@
         "QUAD0_TX1_usrclk": [ { "direction": "in", "driver_value": "0" } ],
         "QUAD0_TX2_usrclk": [ { "direction": "in", "driver_value": "0" } ],
         "QUAD0_TX3_usrclk": [ { "direction": "in", "driver_value": "0" } ],
-        "QUAD0_RX0_usrclk": [ { "direction": "in", "driver_value": "0" } ],
-        "QUAD0_RX1_usrclk": [ { "direction": "in", "driver_value": "0" } ],
-        "QUAD0_RX2_usrclk": [ { "direction": "in", "driver_value": "0" } ],
-        "QUAD0_RX3_usrclk": [ { "direction": "in", "driver_value": "0" } ],
         "INTF0_TX0_ch_txdata": [ { "direction": "in", "size_left": "127", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX0_ch_txbufstatus": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
-        "INTF0_TX0_ch_txpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX0_ch_txrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX0_ch_txpippmen": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX0_ch_txctrl0": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX0_ch_txctrl1": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX0_ch_txctrl2": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX0_ch_txpippmstepsize": [ { "direction": "in", "size_left": "4", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX1_ch_txdata": [ { "direction": "in", "size_left": "127", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX1_ch_txbufstatus": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
-        "INTF0_TX1_ch_txpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX1_ch_txrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX1_ch_txpippmen": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX1_ch_txctrl0": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX1_ch_txctrl1": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX1_ch_txctrl2": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX1_ch_txpippmstepsize": [ { "direction": "in", "size_left": "4", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX2_ch_txdata": [ { "direction": "in", "size_left": "127", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX2_ch_txbufstatus": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
-        "INTF0_TX2_ch_txpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX2_ch_txrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX2_ch_txpippmen": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX2_ch_txctrl0": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX2_ch_txctrl1": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX2_ch_txctrl2": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX2_ch_txpippmstepsize": [ { "direction": "in", "size_left": "4", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX3_ch_txdata": [ { "direction": "in", "size_left": "127", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX3_ch_txbufstatus": [ { "direction": "out", "size_left": "1", "size_right": "0" } ],
-        "INTF0_TX3_ch_txpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX3_ch_txrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX3_ch_txpippmen": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX3_ch_txctrl0": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX3_ch_txctrl1": [ { "direction": "in", "size_left": "15", "size_right": "0", "driver_value": "0" } ],
         "INTF0_TX3_ch_txctrl2": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_TX3_ch_txpippmstepsize": [ { "direction": "in", "size_left": "4", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX0_ch_rxpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX0_ch_rxrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX0_ch_rxdata": [ { "direction": "out", "size_left": "127", "size_right": "0" } ],
-        "INTF0_RX1_ch_rxpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX1_ch_rxrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX1_ch_rxdata": [ { "direction": "out", "size_left": "127", "size_right": "0" } ],
-        "INTF0_RX2_ch_rxpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX2_ch_rxrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX2_ch_rxdata": [ { "direction": "out", "size_left": "127", "size_right": "0" } ],
-        "INTF0_RX3_ch_rxpolarity": [ { "direction": "in", "size_left": "0", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX3_ch_rxrate": [ { "direction": "in", "size_left": "7", "size_right": "0", "driver_value": "0" } ],
-        "INTF0_RX3_ch_rxdata": [ { "direction": "out", "size_left": "127", "size_right": "0" } ],
         "INTF0_TX_clr_out": [ { "direction": "out" } ],
         "INTF0_TX_clrb_leaf_out": [ { "direction": "out" } ],
-        "INTF0_RX_clr_out": [ { "direction": "out" } ],
-        "INTF0_RX_clrb_leaf_out": [ { "direction": "out" } ],
         "INTF0_rst_all_in": [ { "direction": "in", "driver_value": "0" } ],
         "INTF0_rst_tx_pll_and_datapath_in": [ { "direction": "in", "driver_value": "0" } ],
         "INTF0_rst_tx_datapath_in": [ { "direction": "in", "driver_value": "0" } ],
-        "INTF0_rst_tx_done_out": [ { "direction": "out" } ],
-        "INTF0_rst_rx_pll_and_datapath_in": [ { "direction": "in", "driver_value": "0" } ],
-        "INTF0_rst_rx_datapath_in": [ { "direction": "in", "driver_value": "0" } ],
-        "INTF0_rst_rx_done_out": [ { "direction": "out" } ]
+        "INTF0_rst_tx_done_out": [ { "direction": "out" } ]
       },
       "interfaces": {
         "GTWIZ_FREERUN_CLK": {
@@ -1820,24 +1778,6 @@
             "CLK": [ { "physical_name": "QUAD0_GTREFCLK0" } ]
           }
         },
-        "Quad0_GTREFCLK1": {
-          "vlnv": "xilinx.com:signal:clock:1.0",
-          "abstraction_type": "xilinx.com:signal:clock_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "100000000", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
-            "FREQ_TOLERANCE_HZ": [ { "value": "0", "resolve_type": "generated", "format": "long", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_PORT": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "INSERT_VIP": [ { "value": "0", "resolve_type": "user", "format": "long", "usage": "simulation.rtl", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_GTREFCLK1" } ]
-          }
-        },
         "Quad0_TX0_OUTCLK": {
           "vlnv": "xilinx.com:signal:gt_outclk:1.0",
           "abstraction_type": "xilinx.com:signal:gt_outclk_rtl:1.0",
@@ -1898,66 +1838,6 @@
             "CLK": [ { "physical_name": "QUAD0_TX3_outclk" } ]
           }
         },
-        "Quad0_RX0_OUTCLK": {
-          "vlnv": "xilinx.com:signal:gt_outclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_outclk_rtl:1.0",
-          "mode": "master",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "IS_MASTER": [ { "value": "false", "resolve_type": "generated", "format": "bool", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX0_outclk" } ]
-          }
-        },
-        "Quad0_RX1_OUTCLK": {
-          "vlnv": "xilinx.com:signal:gt_outclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_outclk_rtl:1.0",
-          "mode": "master",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "IS_MASTER": [ { "value": "false", "resolve_type": "generated", "format": "bool", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX1_outclk" } ]
-          }
-        },
-        "Quad0_RX2_OUTCLK": {
-          "vlnv": "xilinx.com:signal:gt_outclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_outclk_rtl:1.0",
-          "mode": "master",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "IS_MASTER": [ { "value": "false", "resolve_type": "generated", "format": "bool", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX2_outclk" } ]
-          }
-        },
-        "Quad0_RX3_OUTCLK": {
-          "vlnv": "xilinx.com:signal:gt_outclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_outclk_rtl:1.0",
-          "mode": "master",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "IS_MASTER": [ { "value": "false", "resolve_type": "generated", "format": "bool", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX3_outclk" } ]
-          }
-        },
         "Quad0_GT_Serial": {
           "vlnv": "xilinx.com:interface:gt:1.0",
           "abstraction_type": "xilinx.com:interface:gt_rtl:1.0",
@@ -2036,70 +1916,6 @@
             "CLK": [ { "physical_name": "QUAD0_TX3_usrclk" } ]
           }
         },
-        "Quad0_RX0_USRCLK": {
-          "vlnv": "xilinx.com:signal:gt_usrclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_usrclk_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX0_usrclk" } ]
-          }
-        },
-        "Quad0_RX1_USRCLK": {
-          "vlnv": "xilinx.com:signal:gt_usrclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_usrclk_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX1_usrclk" } ]
-          }
-        },
-        "Quad0_RX2_USRCLK": {
-          "vlnv": "xilinx.com:signal:gt_usrclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_usrclk_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX2_usrclk" } ]
-          }
-        },
-        "Quad0_RX3_USRCLK": {
-          "vlnv": "xilinx.com:signal:gt_usrclk:1.0",
-          "abstraction_type": "xilinx.com:signal:gt_usrclk_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "FREQ_HZ": [ { "value": "156250000", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "PHASE": [ { "value": "0.0", "resolve_type": "generated", "format": "float", "is_ips_inferred": true, "is_static_object": false } ],
-            "CLK_DOMAIN": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_BUSIF": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ASSOCIATED_RESET": [ { "value": "", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "CLK": [ { "physical_name": "QUAD0_RX3_usrclk" } ]
-          }
-        },
         "INTF0_TX0_GT_IP_Interface": {
           "vlnv": "xilinx.com:interface:gt_tx_interface:1.0",
           "abstraction_type": "xilinx.com:interface:gt_tx_interface_rtl:1.0",
@@ -2116,14 +1932,10 @@
           },
           "port_maps": {
             "ch_txdata": [ { "physical_name": "INTF0_TX0_ch_txdata" } ],
-            "ch_txbufstatus": [ { "physical_name": "INTF0_TX0_ch_txbufstatus" } ],
-            "ch_txpolarity": [ { "physical_name": "INTF0_TX0_ch_txpolarity" } ],
             "ch_txrate": [ { "physical_name": "INTF0_TX0_ch_txrate" } ],
-            "ch_txpippmen": [ { "physical_name": "INTF0_TX0_ch_txpippmen" } ],
             "ch_txctrl0": [ { "physical_name": "INTF0_TX0_ch_txctrl0" } ],
             "ch_txctrl1": [ { "physical_name": "INTF0_TX0_ch_txctrl1" } ],
-            "ch_txctrl2": [ { "physical_name": "INTF0_TX0_ch_txctrl2" } ],
-            "ch_txpippmstepsize": [ { "physical_name": "INTF0_TX0_ch_txpippmstepsize" } ]
+            "ch_txctrl2": [ { "physical_name": "INTF0_TX0_ch_txctrl2" } ]
           }
         },
         "INTF0_TX1_GT_IP_Interface": {
@@ -2142,14 +1954,10 @@
           },
           "port_maps": {
             "ch_txdata": [ { "physical_name": "INTF0_TX1_ch_txdata" } ],
-            "ch_txbufstatus": [ { "physical_name": "INTF0_TX1_ch_txbufstatus" } ],
-            "ch_txpolarity": [ { "physical_name": "INTF0_TX1_ch_txpolarity" } ],
             "ch_txrate": [ { "physical_name": "INTF0_TX1_ch_txrate" } ],
-            "ch_txpippmen": [ { "physical_name": "INTF0_TX1_ch_txpippmen" } ],
             "ch_txctrl0": [ { "physical_name": "INTF0_TX1_ch_txctrl0" } ],
             "ch_txctrl1": [ { "physical_name": "INTF0_TX1_ch_txctrl1" } ],
-            "ch_txctrl2": [ { "physical_name": "INTF0_TX1_ch_txctrl2" } ],
-            "ch_txpippmstepsize": [ { "physical_name": "INTF0_TX1_ch_txpippmstepsize" } ]
+            "ch_txctrl2": [ { "physical_name": "INTF0_TX1_ch_txctrl2" } ]
           }
         },
         "INTF0_TX2_GT_IP_Interface": {
@@ -2168,14 +1976,10 @@
           },
           "port_maps": {
             "ch_txdata": [ { "physical_name": "INTF0_TX2_ch_txdata" } ],
-            "ch_txbufstatus": [ { "physical_name": "INTF0_TX2_ch_txbufstatus" } ],
-            "ch_txpolarity": [ { "physical_name": "INTF0_TX2_ch_txpolarity" } ],
             "ch_txrate": [ { "physical_name": "INTF0_TX2_ch_txrate" } ],
-            "ch_txpippmen": [ { "physical_name": "INTF0_TX2_ch_txpippmen" } ],
             "ch_txctrl0": [ { "physical_name": "INTF0_TX2_ch_txctrl0" } ],
             "ch_txctrl1": [ { "physical_name": "INTF0_TX2_ch_txctrl1" } ],
-            "ch_txctrl2": [ { "physical_name": "INTF0_TX2_ch_txctrl2" } ],
-            "ch_txpippmstepsize": [ { "physical_name": "INTF0_TX2_ch_txpippmstepsize" } ]
+            "ch_txctrl2": [ { "physical_name": "INTF0_TX2_ch_txctrl2" } ]
           }
         },
         "INTF0_TX3_GT_IP_Interface": {
@@ -2194,94 +1998,10 @@
           },
           "port_maps": {
             "ch_txdata": [ { "physical_name": "INTF0_TX3_ch_txdata" } ],
-            "ch_txbufstatus": [ { "physical_name": "INTF0_TX3_ch_txbufstatus" } ],
-            "ch_txpolarity": [ { "physical_name": "INTF0_TX3_ch_txpolarity" } ],
             "ch_txrate": [ { "physical_name": "INTF0_TX3_ch_txrate" } ],
-            "ch_txpippmen": [ { "physical_name": "INTF0_TX3_ch_txpippmen" } ],
             "ch_txctrl0": [ { "physical_name": "INTF0_TX3_ch_txctrl0" } ],
             "ch_txctrl1": [ { "physical_name": "INTF0_TX3_ch_txctrl1" } ],
-            "ch_txctrl2": [ { "physical_name": "INTF0_TX3_ch_txctrl2" } ],
-            "ch_txpippmstepsize": [ { "physical_name": "INTF0_TX3_ch_txpippmstepsize" } ]
-          }
-        },
-        "INTF0_RX0_GT_IP_Interface": {
-          "vlnv": "xilinx.com:interface:gt_rx_interface:1.0",
-          "abstraction_type": "xilinx.com:interface:gt_rx_interface_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "CHNL_NUMBER": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "MASTERCLK_SRC": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "GT_DIRECTION": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "RX_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_QUAD_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_FILE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_ENABLE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "ch_rxpolarity": [ { "physical_name": "INTF0_RX0_ch_rxpolarity" } ],
-            "ch_rxrate": [ { "physical_name": "INTF0_RX0_ch_rxrate" } ],
-            "ch_rxdata": [ { "physical_name": "INTF0_RX0_ch_rxdata" } ]
-          }
-        },
-        "INTF0_RX1_GT_IP_Interface": {
-          "vlnv": "xilinx.com:interface:gt_rx_interface:1.0",
-          "abstraction_type": "xilinx.com:interface:gt_rx_interface_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "CHNL_NUMBER": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "MASTERCLK_SRC": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "GT_DIRECTION": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "RX_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_QUAD_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_FILE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_ENABLE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "ch_rxpolarity": [ { "physical_name": "INTF0_RX1_ch_rxpolarity" } ],
-            "ch_rxrate": [ { "physical_name": "INTF0_RX1_ch_rxrate" } ],
-            "ch_rxdata": [ { "physical_name": "INTF0_RX1_ch_rxdata" } ]
-          }
-        },
-        "INTF0_RX2_GT_IP_Interface": {
-          "vlnv": "xilinx.com:interface:gt_rx_interface:1.0",
-          "abstraction_type": "xilinx.com:interface:gt_rx_interface_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "CHNL_NUMBER": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "MASTERCLK_SRC": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "GT_DIRECTION": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "RX_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_QUAD_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_FILE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_ENABLE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "ch_rxpolarity": [ { "physical_name": "INTF0_RX2_ch_rxpolarity" } ],
-            "ch_rxrate": [ { "physical_name": "INTF0_RX2_ch_rxrate" } ],
-            "ch_rxdata": [ { "physical_name": "INTF0_RX2_ch_rxdata" } ]
-          }
-        },
-        "INTF0_RX3_GT_IP_Interface": {
-          "vlnv": "xilinx.com:interface:gt_rx_interface:1.0",
-          "abstraction_type": "xilinx.com:interface:gt_rx_interface_rtl:1.0",
-          "mode": "slave",
-          "parameters": {
-            "PARENT_ID": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "CHNL_NUMBER": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "MASTERCLK_SRC": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "GT_DIRECTION": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "RX_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_QUAD_SETTINGS": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_FILE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ],
-            "ADDITIONAL_CONFIG_ENABLE": [ { "value": "undef", "resolve_type": "generated", "is_ips_inferred": true, "is_static_object": false } ]
-          },
-          "port_maps": {
-            "ch_rxpolarity": [ { "physical_name": "INTF0_RX3_ch_rxpolarity" } ],
-            "ch_rxrate": [ { "physical_name": "INTF0_RX3_ch_rxrate" } ],
-            "ch_rxdata": [ { "physical_name": "INTF0_RX3_ch_rxdata" } ]
+            "ch_txctrl2": [ { "physical_name": "INTF0_TX3_ch_txctrl2" } ]
           }
         }
       }
diff --git a/Sources/MGT/hdl/flx_interlaken_gty.vhd b/Sources/MGT/hdl/flx_interlaken_gty.vhd
index a7279cb0a..d512dda65 100644
--- a/Sources/MGT/hdl/flx_interlaken_gty.vhd
+++ b/Sources/MGT/hdl/flx_interlaken_gty.vhd
@@ -122,6 +122,8 @@ architecture Behavioral of flx_interlaken_gty is
   signal RXPOLARITY_RX_WORD_CLK : std_logic_vector(Lanes - 1 downto 0);
 
 
+
+
 begin
   g_mon_ctrl : for i in 0 to Lanes-1 generate
     CTRL_TCLINK_TX_UI_ALIGN_CALIB(i) <= '0';   --MRMWcheck! to_sl(register_map_control.TCLINK_CONTROL(i).TX_UI_ALIGN_CALIB);
@@ -471,97 +473,55 @@ begin
       signal txctrl2_rev                                                  : slv8_array_t(0 to 3); --MRMW array_8b(0 to 3);
       signal lcplllock0_rev, lcplllock1_rev, rplllock0_rev, rplllock1_rev : std_logic;
 
-      component transceiver_versal_interlaken  -- @suppress "Component declaration 'transceiver_versal_interlaken' has none or multiple matching entity declarations"
-        port(
-          gtpowergood                      : out std_logic;
-          gtwiz_freerun_clk                : in  std_logic;
-          QUAD0_GTREFCLK0                  : in  std_logic;
-          QUAD0_GTREFCLK1                  : in  std_logic;
-          QUAD0_TX0_outclk                 : out std_logic;
-          QUAD0_TX1_outclk                 : out std_logic;
-          QUAD0_TX2_outclk                 : out std_logic;
-          QUAD0_TX3_outclk                 : out std_logic;
-          QUAD0_RX0_outclk                 : out std_logic;
-          QUAD0_RX1_outclk                 : out std_logic;
-          QUAD0_RX2_outclk                 : out std_logic;
-          QUAD0_RX3_outclk                 : out std_logic;
-          QUAD0_rxp                        : in  std_logic_vector(3 downto 0);
-          QUAD0_rxn                        : in  std_logic_vector(3 downto 0);
-          QUAD0_txp                        : out std_logic_vector(3 downto 0);
-          QUAD0_txn                        : out std_logic_vector(3 downto 0);
-          QUAD0_hsclk0_lcplllock           : out std_logic;
-          QUAD0_hsclk1_lcplllock           : out std_logic;
-          QUAD0_hsclk0_rplllock            : out std_logic;
-          QUAD0_hsclk1_rplllock            : out std_logic;
-          QUAD0_TX0_usrclk                 : in  std_logic;
-          QUAD0_TX1_usrclk                 : in  std_logic;
-          QUAD0_TX2_usrclk                 : in  std_logic;
-          QUAD0_TX3_usrclk                 : in  std_logic;
-          QUAD0_RX0_usrclk                 : in  std_logic;
-          QUAD0_RX1_usrclk                 : in  std_logic;
-          QUAD0_RX2_usrclk                 : in  std_logic;
-          QUAD0_RX3_usrclk                 : in  std_logic;
-          INTF0_TX0_ch_txdata              : in  std_logic_vector(127 downto 0);
-          INTF0_TX0_ch_txbufstatus         : out std_logic_vector(1 downto 0);
-          INTF0_TX0_ch_txpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_TX0_ch_txrate              : in  std_logic_vector(7 downto 0);
-          INTF0_TX0_ch_txpippmen           : in  std_logic_vector(0 downto 0);
-          INTF0_TX0_ch_txctrl0             : in  std_logic_vector(15 downto 0);
-          INTF0_TX0_ch_txctrl1             : in  std_logic_vector(15 downto 0);
-          INTF0_TX0_ch_txctrl2             : in  std_logic_vector(7 downto 0);
-          INTF0_TX0_ch_txpippmstepsize     : in  std_logic_vector(4 downto 0);
-          INTF0_TX1_ch_txdata              : in  std_logic_vector(127 downto 0);
-          INTF0_TX1_ch_txbufstatus         : out std_logic_vector(1 downto 0);
-          INTF0_TX1_ch_txpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_TX1_ch_txrate              : in  std_logic_vector(7 downto 0);
-          INTF0_TX1_ch_txpippmen           : in  std_logic_vector(0 downto 0);
-          INTF0_TX1_ch_txctrl0             : in  std_logic_vector(15 downto 0);
-          INTF0_TX1_ch_txctrl1             : in  std_logic_vector(15 downto 0);
-          INTF0_TX1_ch_txctrl2             : in  std_logic_vector(7 downto 0);
-          INTF0_TX1_ch_txpippmstepsize     : in  std_logic_vector(4 downto 0);
-          INTF0_TX2_ch_txdata              : in  std_logic_vector(127 downto 0);
-          INTF0_TX2_ch_txbufstatus         : out std_logic_vector(1 downto 0);
-          INTF0_TX2_ch_txpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_TX2_ch_txrate              : in  std_logic_vector(7 downto 0);
-          INTF0_TX2_ch_txpippmen           : in  std_logic_vector(0 downto 0);
-          INTF0_TX2_ch_txctrl0             : in  std_logic_vector(15 downto 0);
-          INTF0_TX2_ch_txctrl1             : in  std_logic_vector(15 downto 0);
-          INTF0_TX2_ch_txctrl2             : in  std_logic_vector(7 downto 0);
-          INTF0_TX2_ch_txpippmstepsize     : in  std_logic_vector(4 downto 0);
-          INTF0_TX3_ch_txdata              : in  std_logic_vector(127 downto 0);
-          INTF0_TX3_ch_txbufstatus         : out std_logic_vector(1 downto 0);
-          INTF0_TX3_ch_txpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_TX3_ch_txrate              : in  std_logic_vector(7 downto 0);
-          INTF0_TX3_ch_txpippmen           : in  std_logic_vector(0 downto 0);
-          INTF0_TX3_ch_txctrl0             : in  std_logic_vector(15 downto 0);
-          INTF0_TX3_ch_txctrl1             : in  std_logic_vector(15 downto 0);
-          INTF0_TX3_ch_txctrl2             : in  std_logic_vector(7 downto 0);
-          INTF0_TX3_ch_txpippmstepsize     : in  std_logic_vector(4 downto 0);
-          INTF0_RX0_ch_rxpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_RX0_ch_rxrate              : in  std_logic_vector(7 downto 0);
-          INTF0_RX0_ch_rxdata              : out std_logic_vector(127 downto 0);
-          INTF0_RX1_ch_rxpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_RX1_ch_rxrate              : in  std_logic_vector(7 downto 0);
-          INTF0_RX1_ch_rxdata              : out std_logic_vector(127 downto 0);
-          INTF0_RX2_ch_rxpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_RX2_ch_rxrate              : in  std_logic_vector(7 downto 0);
-          INTF0_RX2_ch_rxdata              : out std_logic_vector(127 downto 0);
-          INTF0_RX3_ch_rxpolarity          : in  std_logic_vector(0 downto 0);
-          INTF0_RX3_ch_rxrate              : in  std_logic_vector(7 downto 0);
-          INTF0_RX3_ch_rxdata              : out std_logic_vector(127 downto 0);
-          INTF0_TX_clr_out                 : out std_logic;
-          INTF0_TX_clrb_leaf_out           : out std_logic;
-          INTF0_RX_clr_out                 : out std_logic;
-          INTF0_RX_clrb_leaf_out           : out std_logic;
-          INTF0_rst_all_in                 : in  std_logic;
-          INTF0_rst_tx_pll_and_datapath_in : in  std_logic;
-          INTF0_rst_tx_datapath_in         : in  std_logic;
-          INTF0_rst_tx_done_out            : out std_logic;
-          INTF0_rst_rx_pll_and_datapath_in : in  std_logic;
-          INTF0_rst_rx_datapath_in         : in  std_logic;
-          INTF0_rst_rx_done_out            : out std_logic
-          );
-      end component;
+      COMPONENT transceiver_versal_interlaken
+  PORT (
+    gtpowergood : OUT STD_LOGIC;
+    gtwiz_freerun_clk : IN STD_LOGIC;
+    QUAD0_GTREFCLK0 : IN STD_LOGIC;
+    QUAD0_TX0_outclk : OUT STD_LOGIC;
+    QUAD0_TX1_outclk : OUT STD_LOGIC;
+    QUAD0_TX2_outclk : OUT STD_LOGIC;
+    QUAD0_TX3_outclk : OUT STD_LOGIC;
+    QUAD0_rxp : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
+    QUAD0_rxn : IN STD_LOGIC_VECTOR(3 DOWNTO 0);
+    QUAD0_txp : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
+    QUAD0_txn : OUT STD_LOGIC_VECTOR(3 DOWNTO 0);
+    QUAD0_hsclk0_lcplllock : OUT STD_LOGIC;
+    QUAD0_hsclk1_lcplllock : OUT STD_LOGIC;
+    QUAD0_hsclk0_rplllock : OUT STD_LOGIC;
+    QUAD0_hsclk1_rplllock : OUT STD_LOGIC;
+    QUAD0_TX0_usrclk : IN STD_LOGIC;
+    QUAD0_TX1_usrclk : IN STD_LOGIC;
+    QUAD0_TX2_usrclk : IN STD_LOGIC;
+    QUAD0_TX3_usrclk : IN STD_LOGIC;
+    INTF0_TX0_ch_txdata : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
+    INTF0_TX0_ch_txrate : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX0_ch_txctrl0 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX0_ch_txctrl1 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX0_ch_txctrl2 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX1_ch_txdata : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
+    INTF0_TX1_ch_txrate : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX1_ch_txctrl0 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX1_ch_txctrl1 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX1_ch_txctrl2 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX2_ch_txdata : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
+    INTF0_TX2_ch_txrate : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX2_ch_txctrl0 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX2_ch_txctrl1 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX2_ch_txctrl2 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX3_ch_txdata : IN STD_LOGIC_VECTOR(127 DOWNTO 0);
+    INTF0_TX3_ch_txrate : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX3_ch_txctrl0 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX3_ch_txctrl1 : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
+    INTF0_TX3_ch_txctrl2 : IN STD_LOGIC_VECTOR(7 DOWNTO 0);
+    INTF0_TX_clr_out : OUT STD_LOGIC;
+    INTF0_TX_clrb_leaf_out : OUT STD_LOGIC;
+    INTF0_rst_all_in : IN STD_LOGIC;
+    INTF0_rst_tx_pll_and_datapath_in : IN STD_LOGIC;
+    INTF0_rst_tx_datapath_in : IN STD_LOGIC;
+    INTF0_rst_tx_done_out : OUT STD_LOGIC 
+  );
+END COMPONENT;
 
     begin
 
@@ -911,16 +871,16 @@ begin
         port map(
           gtpowergood                      => open,
           gtwiz_freerun_clk                => clk100,                      --: in STD_LOGIC;
-          QUAD0_GTREFCLK0                  => GTREFCLK_VERSAL_SEL0(quad),  -- Interlaken 25 Gbps
-          QUAD0_GTREFCLK1                  => GTREFCLK_VERSAL_SEL1(quad),  -- TTC LTI 9.6 Gbps
+          QUAD0_GTREFCLK0                  => GTREFCLK_VERSAL_SEL1(quad),  -- Interlaken 25 Gbps
+          --QUAD0_GTREFCLK1                  => GTREFCLK_VERSAL_SEL1(quad),  -- TTC LTI 9.6 Gbps
           QUAD0_TX0_outclk                 => txoutclk_rev(0),
           QUAD0_TX1_outclk                 => txoutclk_rev(1),
           QUAD0_TX2_outclk                 => txoutclk_rev(2),
           QUAD0_TX3_outclk                 => txoutclk_rev(3),
-          QUAD0_RX0_outclk                 => rxoutclk_rev(0),
-          QUAD0_RX1_outclk                 => rxoutclk_rev(1),
-          QUAD0_RX2_outclk                 => rxoutclk_rev(2),
-          QUAD0_RX3_outclk                 => rxoutclk_rev(3),
+          --QUAD0_RX0_outclk                 => rxoutclk_rev(0),
+          --QUAD0_RX1_outclk                 => rxoutclk_rev(1),
+          --QUAD0_RX2_outclk                 => rxoutclk_rev(2),
+          --QUAD0_RX3_outclk                 => rxoutclk_rev(3),
           QUAD0_rxp                        => gtyrxp_in,                   --: in STD_LOGIC_VECTOR ( 3 downto 0 );
           QUAD0_rxn                        => gtyrxn_in,                   --: in STD_LOGIC_VECTOR ( 3 downto 0 );
           QUAD0_txp                        => gtytxp_out,                  --: out STD_LOGIC_VECTOR ( 3 downto 0 );
@@ -933,69 +893,69 @@ begin
           QUAD0_TX1_usrclk                 => txusrclk_rev(1),
           QUAD0_TX2_usrclk                 => txusrclk_rev(2),
           QUAD0_TX3_usrclk                 => txusrclk_rev(3),
-          QUAD0_RX0_usrclk                 => rxusrclk_rev(0),
-          QUAD0_RX1_usrclk                 => rxusrclk_rev(1),
-          QUAD0_RX2_usrclk                 => rxusrclk_rev(2),
-          QUAD0_RX3_usrclk                 => rxusrclk_rev(3),
+          --QUAD0_RX0_usrclk                 => rxusrclk_rev(0),
+          --QUAD0_RX1_usrclk                 => rxusrclk_rev(1),
+          --QUAD0_RX2_usrclk                 => rxusrclk_rev(2),
+          --QUAD0_RX3_usrclk                 => rxusrclk_rev(3),
           INTF0_TX0_ch_txdata              => txdata0_rev,
-          INTF0_TX0_ch_txbufstatus         => txbufstatus_rev(0),
-          INTF0_TX0_ch_txpolarity          => txpolarity_rev(0 downto 0),
+          --INTF0_TX0_ch_txbufstatus         => txbufstatus_rev(0),
+          --INTF0_TX0_ch_txpolarity          => txpolarity_rev(0 downto 0),
           INTF0_TX0_ch_txrate              => x"00",
-          INTF0_TX0_ch_txpippmen           => txpippmen_rev(0 downto 0),
+          --INTF0_TX0_ch_txpippmen           => txpippmen_rev(0 downto 0),
           INTF0_TX0_ch_txctrl0             => txctrl0_rev(0),
           INTF0_TX0_ch_txctrl1             => txctrl1_rev(0),
           INTF0_TX0_ch_txctrl2             => txctrl2_rev(0),
-          INTF0_TX0_ch_txpippmstepsize     => txpippmstepsize_rev(0),
+          --INTF0_TX0_ch_txpippmstepsize     => txpippmstepsize_rev(0),
           INTF0_TX1_ch_txdata              => txdata1_rev,
-          INTF0_TX1_ch_txbufstatus         => txbufstatus_rev(1),
-          INTF0_TX1_ch_txpolarity          => txpolarity_rev(1 downto 1),
+          --INTF0_TX1_ch_txbufstatus         => txbufstatus_rev(1),
+          --INTF0_TX1_ch_txpolarity          => txpolarity_rev(1 downto 1),
           INTF0_TX1_ch_txrate              => x"00",
-          INTF0_TX1_ch_txpippmen           => txpippmen_rev(1 downto 1),
+          --INTF0_TX1_ch_txpippmen           => txpippmen_rev(1 downto 1),
           INTF0_TX1_ch_txctrl0             => txctrl0_rev(1),
           INTF0_TX1_ch_txctrl1             => txctrl1_rev(1),
           INTF0_TX1_ch_txctrl2             => txctrl2_rev(1),
-          INTF0_TX1_ch_txpippmstepsize     => txpippmstepsize_rev(1),
+          --INTF0_TX1_ch_txpippmstepsize     => txpippmstepsize_rev(1),
           INTF0_TX2_ch_txdata              => txdata2_rev,
-          INTF0_TX2_ch_txbufstatus         => txbufstatus_rev(2),
-          INTF0_TX2_ch_txpolarity          => txpolarity_rev(2 downto 2),
+          --INTF0_TX2_ch_txbufstatus         => txbufstatus_rev(2),
+          --INTF0_TX2_ch_txpolarity          => txpolarity_rev(2 downto 2),
           INTF0_TX2_ch_txrate              => x"00",
-          INTF0_TX2_ch_txpippmen           => txpippmen_rev(2 downto 2),
+          --INTF0_TX2_ch_txpippmen           => txpippmen_rev(2 downto 2),
           INTF0_TX2_ch_txctrl0             => txctrl0_rev(2),
           INTF0_TX2_ch_txctrl1             => txctrl1_rev(2),
           INTF0_TX2_ch_txctrl2             => txctrl2_rev(2),
-          INTF0_TX2_ch_txpippmstepsize     => txpippmstepsize_rev(2),
+          --INTF0_TX2_ch_txpippmstepsize     => txpippmstepsize_rev(2),
           INTF0_TX3_ch_txdata              => txdata3_rev,
-          INTF0_TX3_ch_txbufstatus         => txbufstatus_rev(3),
-          INTF0_TX3_ch_txpolarity          => txpolarity_rev(3 downto 3),
+          --INTF0_TX3_ch_txbufstatus         => txbufstatus_rev(3),
+          --INTF0_TX3_ch_txpolarity          => txpolarity_rev(3 downto 3),
           INTF0_TX3_ch_txrate              => x"00",
-          INTF0_TX3_ch_txpippmen           => txpippmen_rev(3 downto 3),
+          --INTF0_TX3_ch_txpippmen           => txpippmen_rev(3 downto 3),
           INTF0_TX3_ch_txctrl0             => txctrl0_rev(3),
           INTF0_TX3_ch_txctrl1             => txctrl1_rev(3),
           INTF0_TX3_ch_txctrl2             => txctrl2_rev(3),
-          INTF0_TX3_ch_txpippmstepsize     => txpippmstepsize_rev(3),
-          INTF0_RX0_ch_rxpolarity          => rxpolarity_rev(0 downto 0),
-          INTF0_RX0_ch_rxrate              => x"00",
-          INTF0_RX0_ch_rxdata              => rxdata0_rev,
-          INTF0_RX1_ch_rxpolarity          => rxpolarity_rev(1 downto 1),
-          INTF0_RX1_ch_rxrate              => x"00",
-          INTF0_RX1_ch_rxdata              => rxdata1_rev,
-          INTF0_RX2_ch_rxpolarity          => rxpolarity_rev(2 downto 2),
-          INTF0_RX2_ch_rxrate              => x"00",
-          INTF0_RX2_ch_rxdata              => rxdata2_rev,
-          INTF0_RX3_ch_rxpolarity          => rxpolarity_rev(3 downto 3),
-          INTF0_RX3_ch_rxrate              => x"00",
-          INTF0_RX3_ch_rxdata              => rxdata3_rev,
-          INTF0_TX_clr_out                 => open,
+          --INTF0_TX3_ch_txpippmstepsize     => txpippmstepsize_rev(3),
+--          INTF0_RX0_ch_rxpolarity          => rxpolarity_rev(0 downto 0),
+--          INTF0_RX0_ch_rxrate              => x"00",
+--          INTF0_RX0_ch_rxdata              => rxdata0_rev,
+--          INTF0_RX1_ch_rxpolarity          => rxpolarity_rev(1 downto 1),
+--          INTF0_RX1_ch_rxrate              => x"00",
+--          INTF0_RX1_ch_rxdata              => rxdata1_rev,
+--          INTF0_RX2_ch_rxpolarity          => rxpolarity_rev(2 downto 2),
+--          INTF0_RX2_ch_rxrate              => x"00",
+--          INTF0_RX2_ch_rxdata              => rxdata2_rev,
+--          INTF0_RX3_ch_rxpolarity          => rxpolarity_rev(3 downto 3),
+--          INTF0_RX3_ch_rxrate              => x"00",
+--          INTF0_RX3_ch_rxdata              => rxdata3_rev,
+--          INTF0_TX_clr_out                 => open,
           INTF0_TX_clrb_leaf_out           => open,
-          INTF0_RX_clr_out                 => open,
-          INTF0_RX_clrb_leaf_out           => open,
+          --INTF0_RX_clr_out                 => open,
+          --INTF0_RX_clrb_leaf_out           => open,
           INTF0_rst_all_in                 => gtwiz_reset_all_in(0),
           INTF0_rst_tx_pll_and_datapath_in => rst_tx_pll_and_datapath_in(quad),
           INTF0_rst_tx_datapath_in         => rst_tx_datapath_in(quad),
-          INTF0_rst_tx_done_out            => txresetdone,
-          INTF0_rst_rx_pll_and_datapath_in => rst_rx_pll_and_datapath_in(quad),
-          INTF0_rst_rx_datapath_in         => rst_rx_datapath_in(quad),
-          INTF0_rst_rx_done_out            => rxresetdone
+          INTF0_rst_tx_done_out            => txresetdone
+          --INTF0_rst_rx_pll_and_datapath_in => rst_rx_pll_and_datapath_in(quad),
+          --INTF0_rst_rx_datapath_in         => rst_rx_datapath_in(quad),
+          --INTF0_rst_rx_done_out            => rxresetdone
           );
 
       rxgearbox_data_in <= ch3_rxdata_ext_0(63 downto 0) & ch2_rxdata_ext_0(63 downto 0) & ch1_rxdata_ext_0(63 downto 0) & ch0_rxdata_ext_0(63 downto 0);
diff --git a/versal_image b/versal_image
index c70e7bada..f767c40d2 160000
--- a/versal_image
+++ b/versal_image
@@ -1 +1 @@
-Subproject commit c70e7bada68351f9e4182f6fc3c969d3f4fdf44d
+Subproject commit f767c40d2515c442c538a6eb9127ab9af3d5360c
