## Baby/IW4_VPK180 Synthesis Utilization report


                                                                                                       
| **Site Type** |    **Used** |     **Fixed** |   **Prohibited** |    **Available** |    **Util%** |   
| ---    |      ---  |        ---   |         --- |              ---  |             ---  |             
| CLB    LUTs*  |    100056   |     0         |   0              |    3360896       |    2.98      |   
| Block  RAM    Tile |        258.5 |         0   |              0    |             4941 |         5.23
| URAM   |      33   |        0     |         0   |              2549 |             1.29 |             
| Bonded IOB    |    21       |     0         |   0              |    702           |    2.99      |   
                                                                                                       
## Baby/IW4_VPK180 Implementation Utilization report


                                                                                                          
| **Site Type**    |    **Used** |     **Fixed** |   **Prohibited** |    **Available** |    **Util%** |   
| ---    |         ---  |        ---   |         --- |              ---  |             ---  |             
| CLB    LUTs      |    102352   |     0         |   0              |    3360896       |    3.05      |   
| CLB    Registers |    143524   |     0         |   0              |    6721792       |    2.14      |   
| Block  RAM       Tile |        275.5 |         0   |              0    |             4941 |         5.58
| URAM   |         33   |        0     |         0   |              2549 |             1.29 |             
| Bonded IOB       |    132      |     132       |   0              |    702           |    18.80     |   
                                                                                                          
