## MainProject/MainProject_VPK180 Synthesis Utilization report


                                                                                                        
| **Site Type** |    **Used** |     **Fixed** |   **Prohibited** |    **Available** |    **Util%** |    
| ---    |      ---  |        ---   |         --- |              ---  |             ---  |              
| CLB    LUTs*  |    112547   |     0         |   0              |    3360896       |    3.35      |    
| Block  RAM    Tile |        696.5 |         0   |              0    |             4941 |         14.10
| URAM   |      0    |        0     |         0   |              2549 |             0.00 |              
| Bonded IOB    |    0        |     0         |   0              |    702           |    0.00      |    
                                                                                                        
## MainProject/MainProject_VPK180 Implementation Utilization report


                                                                                                           
| **Site Type**    |    **Used** |     **Fixed** |   **Prohibited** |    **Available** |    **Util%** |    
| ---    |         ---  |        ---   |         --- |              ---  |             ---  |              
| CLB    LUTs      |    129491   |     0         |   0              |    3360896       |    3.85      |    
| CLB    Registers |    275988   |     0         |   0              |    6721792       |    4.11      |    
| Block  RAM       Tile |        740.5 |         0   |              0    |             4941 |         14.99
| URAM   |         0    |        0     |         0   |              2549 |             0.00 |              
| Bonded IOB       |    132      |     132       |   0              |    702           |    18.80     |    
                                                                                                           
