Generation Settings
Component declarations | yes |
Configurations | in separate file |
add pragmas |
include view name |
Declarations
Ports:
Diagram Signals:
signal clk160 : std_logic
signal clk : std_logic
signal rst : std_logic
signal flink : std_logic
signal bcr_in : std_logic
signal ls_in : std_logic
signal pr_in_req : std_logic
signal pr_in_l0id : std_logic_vector(7 downto 0)
signal pr_in_done : std_logic
signal lp_in_req : std_logic
signal lp_in_l0id : std_logic_vector(7 downto 0)
signal lp_in_done : std_logic
signal symbol_align : std_logic_vector(2 downto 0)
signal dec_isidle : std_logic
signal bcr_out : std_logic
signal ls_out : std_logic
signal lp_out_valid : std_logic
signal pr_out_valid : std_logic
signal enc_isidle : std_logic
signal l0id_out : std_logic_vector(7 downto 0)
signal dec_symbol : std_logic_vector(3 downto 0)
signal enc_symbol : std_logic_vector(3 downto 0)
signal dec_error : std_logic -- asserted if a symbol decodes as "1111" or "0000"
signal enc_spysymb : t_usymbol
signal dec_spysymb : t_usymbol
signal dec_output_en : std_logic
Pre User:
Post User:
Package List
library ieee;
use ieee.std_logic_1164.ALL;
use ieee.std_logic_arith.ALL;
use ieee.std_logic_unsigned.ALL;
library readout130;
use readout130.pkg_star_flink.ALL;
Bundles