# Generated by Xilinx Architecture Wizard
# --- UCF Template Only ---
# Cut and paste these attributes into the project's UCF file, if desired
INST DCM_ADV_INST1 CLK_FEEDBACK = 1X;
INST DCM_ADV_INST1 CLKDV_DIVIDE = 3.0;
INST DCM_ADV_INST1 CLKFX_DIVIDE = 1;
INST DCM_ADV_INST1 CLKFX_MULTIPLY = 4;
INST DCM_ADV_INST1 CLKIN_DIVIDE_BY_2 = FALSE;
INST DCM_ADV_INST1 CLKIN_PERIOD = 8.000;
INST DCM_ADV_INST1 CLKOUT_PHASE_SHIFT = NONE;
INST DCM_ADV_INST1 DCM_AUTOCALIBRATION = TRUE;
INST DCM_ADV_INST1 DCM_PERFORMANCE_MODE = MAX_SPEED;
INST DCM_ADV_INST1 DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
INST DCM_ADV_INST1 DFS_FREQUENCY_MODE = LOW;
INST DCM_ADV_INST1 DLL_FREQUENCY_MODE = LOW;
INST DCM_ADV_INST1 DUTY_CYCLE_CORRECTION = TRUE;
INST DCM_ADV_INST1 FACTORY_JF = F0F0;
INST DCM_ADV_INST1 PHASE_SHIFT = 0;
INST DCM_ADV_INST1 STARTUP_WAIT = FALSE;
INST DCM_ADV_INST2 CLK_FEEDBACK = 1X;
INST DCM_ADV_INST2 CLKDV_DIVIDE = 2.0;
INST DCM_ADV_INST2 CLKFX_DIVIDE = 1;
INST DCM_ADV_INST2 CLKFX_MULTIPLY = 4;
INST DCM_ADV_INST2 CLKIN_DIVIDE_BY_2 = FALSE;
INST DCM_ADV_INST2 CLKIN_PERIOD = 24.000;
INST DCM_ADV_INST2 CLKOUT_PHASE_SHIFT = NONE;
INST DCM_ADV_INST2 DCM_AUTOCALIBRATION = TRUE;
INST DCM_ADV_INST2 DCM_PERFORMANCE_MODE = MAX_SPEED;
INST DCM_ADV_INST2 DESKEW_ADJUST = SYSTEM_SYNCHRONOUS;
INST DCM_ADV_INST2 DFS_FREQUENCY_MODE = LOW;
INST DCM_ADV_INST2 DLL_FREQUENCY_MODE = LOW;
INST DCM_ADV_INST2 DUTY_CYCLE_CORRECTION = TRUE;
INST DCM_ADV_INST2 FACTORY_JF = F0F0;
INST DCM_ADV_INST2 PHASE_SHIFT = 0;
INST DCM_ADV_INST2 STARTUP_WAIT = FALSE;