Minutes for UCL Proton Calorimetry Meetings, 1st July
Simon Jolly, Laurent Kelleter, Saad Shaikh, Raffaella Radogna, Fern Pannell
- Making good progress on code for communicating FPGA with DDC232: developing from scratch in VHDL using DDC232 datasheet guidelines.
- Currently debugging so that code compiles on Vivado.
- Will need to develop a 'test bench' to test code in simulation before trying it out on hardware.
- Need to debug UART interface code and figure out how to send data received from DDC232 to computer through UART.
- UART is probably only fast enough to support integration time of about 750 us. Will need to investigate other methods of data retrieval down the line.