TIM FDR Information Page

The TIM FDR is scheduled for 9:00 28 June 2004, CERN Room 14-4-0. See the CERN Agenda System entry.

This page provides supporting and background information we feel may be useful to the reviewers. Included are the talks, which are also on the Agenda page.

Please feel free to contact us if you have any questions. atlas-tim@hep.ucl.ac.uk

TIM FDR Supporting Documention

Paper for LEB 2001 Electronics Workshop in Stockholm (pdf 3.5M) (doc 1M) (ps 3M)
Overview and Essential Model (html)
Requirements Document (html)
TIM-RCC Interface Specification (html)
TIM-BOC Interface Specification (html)
TIM-ROD Interface Specification (html)
Registers Description (html)
User Manual (Incomplete/Draft) (html)
Functionality Notes (doc)
TIM-3A Schematics (pdf)
TIM-3B Schematics (PRELIMINARY) (pdf)
Backplane Document (pdf)
Latency Specification
Resonant Wire Paper (pdf) (doc 18M!)

TIM FDR Background Documentation

• TIM-3A Schematics and Layout
  Schematics (pdf)
Layout: Tracks (pdf), Power (pdf), Silks (pdf).
Netlist (rpt), Parts List (ps).
Cadence physical (.brd zip)

• TIM-3B Schematics and Layout (PRELIMINARY!)
  Schematics (pdf)
  Top and Bottom Layers (pdf)
  Netlist (rpt)
  


• TIM-3A Setup/Testing
  Physical Setup (txt)
  Acceptance Testing/Sequence (txt)
  


• TIM Test Board
  Schematics, Layout & Assembly (pdf)
  (ps) Schematics, Layout, TopSilk, Netlist.
  


• TTC Information
  TTCrq Manual
  QPLL Manual 1.0
  Timing Distribution at the LHC Document
  Timing and Synchronization in the LHC Experiments Document
  Timing, Trigger and Control (TTC) Systems for the LHC Document
  


More information can be found on the TIM Main Page.

TIM FDR Presentations

• Overview (MP)
  System Overview Picture
  


• Requirements (JBL)
  


• Interface to ROD Crate Components (MW)
  


• Interface to TTC (TTC signals/BCID) (JBL)
  


• TIM Hardware
  Hardware (inputs/outputs/clocks/busys) (MP)
  PCB layout (MP)
  Changes TIM-2->TIM-3A->TIM-3B (MW)
  Firmware (MW)
  


• TTCrm/TTCrq issue (MP)
  


• Resonant Triggers (MW)
  


• Performance testing
  Latency (JBL)
  Timlet & Timrun (JBL)
  Timing and Jitter (MP)
  Tests with ROD Crate (John Hill)
  


• Schedule for production (JMB)
  


• Costs (MP)