TIM for Muons (TIM-3E)
TIM-3E has been produced by ATLAS Muon groups using the SCT/Pixel production design (TIM-3C). It is identical except that a minor modification (performed post-production on the TIM-3C's) has been included from the schematic level.
This page contains only Muon-TIM specific information - see the the TIM-3 and General pages for the full documentation.
- Setup/Testing
Basic Acceptance Testing DRAFT (txt).
During testing we spotted that the signals LEDs (L1A, ECR, BCR, CAL, FER, Spare) were not always on when expected to be when using the internal clock. This problem seems to be related to changes in the timing characteristics of the batch of monostables used to stretch these signals to visible lengths. We have been able improve the reliability a great deal (but not all the way up to 100% unfortunately) by increasing the pulse-width of the source signal from 25ns to 40ns. A side-affect of this is that front-panel NIM and ECL versions of these signals are also stretched to 40ns. To remove this 'feature' set ShortFPSigsEn in Enables 3 register. These modifications are available now in the latest FPGA2 firmware.
CSC
- TIM-3E/CSC Setting-Up List (txt). Use with TIM-3C Setup Photos (8M pdf) except for Photo 2 (pg.2), where the TIM-3E/CSC specific dip switch settings photo should be used instead.
- Post-manufacture TIM-3E/CSC Finishing-Off List (txt).
MDT
- TIM-3E/MDT Setting-Up List (txt). Use with TIM-3C Setup Photos (8M pdf) except for Photo 2 (pg.2), where the TIM-3E/MDT specific dip switch settings photo should be used instead.
- Post-manufacture TIM-3E/MDT Finishing-Off List (txt).
- Firmware
We suggest using the latest firmware on your test TIM-3E, but delay reprogramming all of your boards as long as is convenient.
The TIM-3E's were shipped with the following firmware (version 11): FPGA1 v03, FPGA2 v11.
Use Register List Draft 11 with this firmware. - TIM-3E Schematics and Layout
All in PDF format unless stated.
Schematics.
Assembly: Top, Bottom, Drilling.
Kitting List, Parts List, Order List, Netlist (.rpt)
Cadence physical .brd (8M)
Copyright © 2003-2022 UCL HEP ATLAS Electronics Group (last modified 19 Apr 2022)